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L9733 データシート(PDF) 17 Page - STMicroelectronics |
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L9733 データシート(HTML) 17 Page - STMicroelectronics |
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17 / 34 page ![]() L9733 Electrical performance characteristics Doc ID 11319 Rev 11 17/34 Figure 3. DO loading for disable time measurement Figure 4. Output loading for slew rate measurements Figure 5. SPI input/output timings Figure 6. SPI timing diagram 1 k Vcc DO 1 k +5 V 1.0 V 4.0 V 0 V DOdis CS DO 1 k Vcc DO 1 k +5 V 1.0 V 4.0 V 0 V DOdis CS DO Vbat Outputs 1-8 All Low Side Outputs must meet the slew rate requirements of this load condition 180 Outputs 1-8 All High Side Outputs must meet the slew rate requirements of this load condition 180 SCLKlm SCLKhm SCLKwid SCLKfall SCLKrise SCLK CSfall CSrise DIfall DIrise DOfall DOrise CS DO DI 10% 90% 10% 90% 90% 10% 10% 90% SCLKlm SCLKhm SCLKwid SCLKfall SCLKrise SCLK CSfall CSrise DIfall DIrise DOfall DOrise CS DO DI 10% 90% 10% 90% 90% 10% 10% 90% CS SCLK DO DI CS lag DO dis DO a DO hm DO sum FAULT LSB FAULT MSB DI LSB DI MSB DI CS lead DI hs DI sus CS2SCLK CS SCLK DO DI CS lag DO dis DO a DO hm DO sum FAULT LSB FAULT MSB DI LSB DI MSB DI CS lead DI hs DI sus CS2SCLK |
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