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AT25DF641 データシート(PDF) 21 Page - List of Unclassifed Manufacturers

部品番号 AT25DF641
部品情報  Minimum Serial Peripheral Interface Serial Flash Memory
PDF  56 Pages
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メーカー  ETC2 [List of Unclassifed Manufacturers]
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AT25DF641 データシート(HTML) 21 Page - List of Unclassifed Manufacturers

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AT25DF641
21
3680F–DFLASH–4/10
Figure 7-8.
Program/Erase Resume
SO
SI
SCK
CS
MS B
2
3
1
0
1
1
0
1
0
0
0
0
6
7
5
4
OP C ODE
HIG H-IMP E DANC E
8.
Protection Commands and Features
8.1.
Write Enable
The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Register to a logical “1”
state. The WEL bit must be set before a Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector
Lockdown, Freeze Sector Lockdown State, Program OTP Security Register, or Write Status Register command
can be executed. This makes the issuance of these commands a two step process, thereby reducing the chances
of a command being accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to
the issuance of one of these commands, then the command will not be executed.
To issue the Write Enable command, the
pin must first be asserted and the opcode of 06h must be clocked
into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode
will be ignored. When the
pin is deasserted, the WEL bit in the Status Register will be set to a logical “1”. The
complete opcode must be clocked into the device before the
pin is deasserted, and the
pin must be
deasserted on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation and
the state of the WEL bit will not change.
Figure 8-1.
Write Enable
SO
SI
SCK
CS
MS B
2
3
1
0
0
0
0
0
0
1
1
0
6
7
5
4
OP C ODE
HIG H-IMP E DANC E
CS
CS
CS
CS



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