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DS80C400 データシート(PDF) 21 Page - Dallas Semiconductor

部品番号 DS80C400
部品情報  DS80C400 Network Microcontroller
PDF  97 Pages
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メーカー  DALLAS [Dallas Semiconductor]
ホームページ  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS80C400 データシート(HTML) 21 Page - Dallas Semiconductor

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DS80C400 Network Microcontroller
21 of 97
NONMULTIPLEXED, 9-CYCLE DATA MEMORY
CE0-7 WRITE
OW PIN TIMING CHARACTERISTICS (Note 1)
(VCC3 = 3.0V to 3.6V, VCC1 = 1.8V ±10%, TA = -40°C to +85°C.)
STANDARD
OVERDRIVE
LONGLINE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
Transmit Reset Pulse Low Time
(Note 2)
tRSTL
500.8
626
50.4
63
500.8
626
ms
Transmit Reset Pulse High Time
(Note 2)
tRSTH
508.8
636
59.2
74
508.8
636
ms
Wait Time for Transmit of Presence
Pulse (Notes 2, 3)
tPDH
15
60
2
6
15
60
ms
Wait Time for Absence of Presence
Pulse (Notes 2, 4)
tPDHCNT
60
75
6.4
8
60
75
ms
Presence Pulse Width (Note 2)
tPDL
60
240
8
24
60
240
ms
Presence Pulse Sampling Time
(Note 2)
tPDS
24
31
2.4
4
30.4
38
ms
Read/Write Data Time Slot
tSLOT
68.8
86
12
15
68.8
86
ms
Low Time for Write 1
tLOW1
4.8
6
0.8
1
7.2
9
ms
Low Time for Write 0
tLOW0
62.4
78
8
10
62.4
78
ms
Write Data Sampling Time
tWDV
15
60
2
6
25
60
ms
Read Data Sampling Time
tRDV
12
15
1.6
2
20
25
ms
Note 1: Specifications to -40°C are guaranteed by design and not production tested.
Note 2: In PMM mode, the master pulls the line low after the first 15
ms for the remainder of the standard speed 1-Wire routine.
Note 3: This parameter quantifies the wait time for the slave devices to respond to the reset pulse and is dependent on the slave device timing.
Note 4: This parameter quantifies the wait time for the case when no presence pulse detected.
Note 5: The maximum timing figures shown apply only when an exact 1-Wire clock frequency can be achieved from the microcontroller input
clock
.
PORT 4 –
3
CE0 -
PORT 6 –
7
-
CE4
PORT 4/6 ADDRESS
A16 -A21
A16 -A21
A16 -A21
A16 -A21
PORT 7



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