L4938ED, L4938EPD

Application information

Doc ID 17243 Rev 2

13/20

The reaction time of the reset circuit originates from the noise immunity. Standby output

voltage drops below the reset threshold only a bit longer than the reaction time results in a

shorter reset delay time. The nominal reset delay time is generated for standby output

voltage drops longer than approximately 50 µs. The minimum reset time is generated if

reset condition only occurs for a short time triggering a reset pulse but not completely

the current. We recommended the use of 10 K

Ω to 5 V as an output pull up.

3.5

Sense comparator

The sense comparator compares an input signal with an internal voltage reference of typical

1.23 V. The use of an external voltage divider makes this comparator very flexible in the

application. It can be used to supervise the input voltage either before or after the protection

diode and to give additional information to the microprocessor like low voltage warnings. We

recommended the use of 10 K

Ω to 5 V as an output pull up.

3.6

Thermal protection

Both outputs are provided with an overtemperature shutdown regulation power dissipation

down to uncritical values. Output 2 shuts down approximately 10 K before output 1. Under

normal conditions shutdown of output 2 allows the chip to cool down again. Thus output 1 is

unaffected. The thermal shutdown reduces the output voltages until power dissipation and

the flow of thermal energy out of the chip balance.

3.7

Transient sensitivity

sensitivity to input transients.

a.

R

PR

22K

4.7K

V

RT

------------

1

–

----------------------

92.9K

–

=

3.8V

V

RT

4.7V

≤≤

t

RDmin

C

⋅

1

μA

------------------------

=

t

RDnom

C

⋅

1

μA

------------------------

=