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ADS5542IPAPR データシート(PDF) 17 Page - Texas Instruments |
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ADS5542IPAPR データシート(HTML) 17 Page - Texas Instruments |
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17 / 33 page ![]() www.ti.com 100 90 80 70 60 50 40 30 20 10 0 −10 −20 −30 Input Amplitude − dBFS −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 f IN = 150MHz SFDR (dBc) SNR (dBc) SNR (dBFS) 90 80 70 60 50 40 30 20 10 0 −10 −20 −30 Input Amplitude − dBFS −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0 f IN = 220MHz SFDR (dBc) SNR (dBc) SNR (dBFS) 95 90 85 80 75 70 65 Differential Clock Amplitude − V 0 0.5 1.0 1.5 2.0 2.5 3.0 f IN = 70MHz SFDR SNR 40 35 30 25 20 15 10 5 0 Code 0 −20 −40 −60 −80 −100 −120 −140 f − Frequency − MHz 0 5 10 15 20 25 30 35 40 f S = 76.8MSPS f IN = 170MHz 100 95 90 85 80 75 70 65 Clock Duty Cycle − % 40 50 45 55 60 f IN = 20MHz SFDR SNR ADS5542 SBAS308D – MAY 2004 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS (continued) Typical values given at T A = 25°C, AVDD = DRVDD = 3.3 V, differential input amplitude = –1dBFS, sampling rate = 80 MSPS and 3-V differential clock, unless otherwise noted AC PERFORMANCE AC PERFORMANCE vs INPUT AMPLITUDE vs INPUT AMPLITUDE Figure 29. Figure 30. OUTPUT AC PERFORMANCE NOISE HISTOGRAM vs CLOCK AMPLITUDE Figure 31. Figure 32. WCDMA AC PERFORMANCE CARRIER vs CLOCK DUTY CYCLE Figure 33. Figure 34. 17 Submit Documentation Feedback |
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