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AD7643 データシート(PDF) 12 Page - Analog Devices

部品番号 AD7643
部品情報  16-Bit, 6 MSPS, PulSAR Differential ADC
PDF  24 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
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AD7643 データシート(HTML) 12 Page - Analog Devices

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AD7625
Data Sheet
Rev. A | Page 12 of 24
TERMINOLOGY
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of an 80 mV p-p sine wave
applied to the common-mode voltage of VIN+ and VIN− at
frequency fS.
CMRR (dB) = 10log(Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS in the ADC output.
Differential Nonlinearity (DNL) Error
In an ideal ADC, code transitions are 1 LSB apart. Differential
nonlinearity is the maximum deviation from this ideal value. It
is often specified in terms of resolution for which no missing
codes are guaranteed.
Integral Nonlinearity (INL) Error
Linearity error refers to the deviation of each individual code
from a line drawn from negative full scale through positive full
scale. The point used as negative full scale occurs ½ LSB before
the first code transition. Positive full scale is defined as a level
1½ LSB beyond the last code transition. The deviation is meas-
ured from the middle of each code to the true straight line.
Dynamic Range
Dynamic range is the ratio of the rms value of the full scale to
the rms noise measured for an input typically at −60 dB. The
value for dynamic range is expressed in decibels.
Effective Number of Bits (ENOB)
ENOB is a measurement of the resolution with a sine wave
input. It is related to SINAD and is expressed in bits by
ENOB = [(SINADdB − 1.76)/6.02]
Gain Error
The first transition (from 100 … 000 to 100 …001) should occur
at a level ½ LSB above nominal negative full scale (−4.0959375 V
for the ±4.096 V range). The last transition (from 011 … 110 to
011 … 111) should occur for an analog voltage 1½ LSB below
the nominal full scale (+4.0959375 V for the ±4.096 V range).
The gain error is the deviation of the difference between the
actual level of the last transition and the actual level of the first
transition from the difference between the ideal levels.
Least Significant Bit (LSB)
The least significant bit, or LSB, is the smallest increment that
can be represented by a converter. For a fully differential input
ADC with N bits of resolution, the LSB expressed in volts is
N
INp-p
V
LSB
2
(V) =
Power Supply Rejection Ratio (PSRR)
Variations in power supply affect the full-scale transition but not
the linearity of the converter. PSRR is the maximum change in
the full-scale transition point due to a change in power supply
voltage from the nominal value.
Reference Voltage Temperature Coefficient
The reference voltage temperature coefficient is derived from the
typical shift of output voltage at 25°C on a sample of parts at the
maximum and minimum reference output voltage (VREF) meas-
ured at TMIN, T(25°C), and TMAX. It is expressed in ppm/°C as
6
10
C
25
(
(
C
ppm/
×
×
°
=
°
)
T
T
(
)
(
V
)
Min
V
)
Max
V
)
(
TCV
MIN
MAX
REF
REF
REF
REF
where:
VREF (Max) = maximum VREF at TMIN, T(25°C), or TMAX.
VREF (Min) = minimum VREF at TMIN, T(25°C), or TMAX.
VREF (25°C) = VREF at 25°C.
TMAX = +85°C.
TMIN = −40°C.
Signal-to-Noise Ratio (SNR)
SNR is the ratio of the rms value of the actual input signal to
the rms sum of all other spectral components below the Nyquist
frequency, excluding harmonics and dc. The value for SNR is
expressed in decibels.
Signal-to-(Noise + Distortion) (SINAD) Ratio
SINAD is the ratio of the rms value of the actual input signal to
the rms sum of all other spectral components below the Nyquist
frequency, including harmonics but excluding dc. The value for
SINAD is expressed in decibels.
Spurious-Free Dynamic Range (SFDR)
SFDR is the difference, in decibels, between the rms amplitude
of the input signal and the peak spurious signal.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first five harmonic
components to the rms value of a full-scale input signal and
is expressed in decibels.
Zero Error
Zero error is the difference between the ideal midscale input
voltage (0 V) and the actual voltage producing the midscale
output code.



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