ACT8810 datasheet(15/54 Pages) ACTIVE-SEMI

15 / 54 page

SYSTEM MANAGEMENT

ACT8810

Rev 9, 15-Nov-12

Innovative Power

- 15 -

www.active-semi.com

ActivePMU

TM and ActivePathTM are trademarks of Active-Semi.

2CTM is a trademark of NXP.

System

Shutdown

260ms

94% of VOUT1

nPBIN

System Enable

OUT1

Enable Qualification

OUT2, OUT3

Reset time Enable

nRSTO

~100ms

First Push

Button

Assert

Power-Hold

Second Push

Button

Release

Button

ON1, ON2, ON3

OUT4, OUT5

REG4.ON[ ],

REG5.ON[ ]

nIRQ

260ms

94% of VOUT1

nPBIN

System Enable

OUT1

Enable Qualification

OUT2, OUT3

Reset time Enable

nRSTO

~100ms

First Push

Button

Assert

Power-Hold

Second Push

Button

Release

Button

System

Shutdown

ON1, ON2, ON3

OUT4, OUT5

nIRQ

Sequence B

The ACT8810QJ2## which is set with “sequence

B“, has a system startup is initiated whenever the

following conditions occurs:

1) nPBIN is pushed low via 100kΩ resistance,

When

ever

this

condition

exists,

the

ACT8810QJ2##

begins

its

system

startup

procedure by enabling REG1. When REG1 reaches

94% of its final regulation voltage, ACT8810QJ2##

automatically turns on REG2 and REG3 and

nRSTO is asserted low, holding the microprocessor

in reset for a user-selectable reset period of 260ms.

If VOUT1 is within 6% of its regulation voltage when

the reset timer expires, the nRSTO is de-asserted,

and the microprocessor can begin its power-up

sequence.

Once

the

power-up

routine

successfully

completed,

the

system

remains

enabled after the push-button is released as long as

the microprocessor asserts any one of ON1, ON2

or ON3. REG4 and REG5 may be enabled if the

microprocessor sets REG4.ON[ ] and REG5.ON[ ]

to 1 via the I2C interface. In other case, REG4 and

REG5 are disable.

This

start-up

procedure

requires

that

the

pushbutton be held until the microprocessor

assumes control (by asserting any one of ON1,

ON2, and ON3), providing protection against

inadvertent

momentary

assertions

the

pushbutton. If desired, longer “push-and-hold” times

can be easily implemented by simply adding an

additional time delay before asserting ON1, ON2, or

ON3. If the microprocessor is unable to complete its

power-up routine successfully before the user lets

go of the push-button, the ACT8810QJ2##

automatically shuts itself down.

Figure 4:

Sequence B

Sequence C

The ACT8810QJ3## which is set with “sequence

C“, has a system startup is initiated whenever the

following conditions occurs:

1) nPBIN is pushed low via 100kΩ resistance,

When

ever

this

condition

exists,

the

ACT8810QJ3##

begins

its

system

startup

procedure by enabling REG1. When REG1 reaches

94% of its final regulation voltage, ACT8810QJ3##

automatically turns on REG2, REG3, REG4, REG5

and

nRSTO

asserted

low,

holding

the

microprocessor in reset for a user-selectable reset

period of 260ms. If VOUT1 is within 6% of its

regulation voltage when the reset timer expires, the

nRSTO is de-asserted, and the microprocessor can

begin its power-up sequence. Once the power-up

routine is successfully completed, the system

remains enabled after the push-button is released

as long as the microprocessor asserts any one of

ON1, ON2 or ON3, and REG4, REG5 may be

enabled or disabled via the I2C interface.

This

start-up

procedure

requires

that

the

pushbutton be held until the microprocessor

assumes control (by asserting any one of ON1,

ON2, and ON3), providing protection against

inadvertent

momentary

assertions

the

pushbutton. If desired, longer “push-and-hold” times

can be easily implemented by simply adding an

additional time delay before asserting ON1, ON2, or

ON3. If the microprocessor is unable to complete its

power-up routine successfully before the user lets

go of the push-button, the ACT8810QJ3##

automatically shuts itself down.

Figure 5:

Sequence C

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