VCON

FB

NC

SGND

BPEN

EN

VIN

SW

PGND

VCON

FB

NC

SGND

BPEN

EN

VIN

SW

PGND

LM3242

SNOSB48D – OCTOBER 2011 – REVISED MARCH 2013

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Connection Diagrams

The actual physical placement of the package marking will vary from part to part.

Figure 1. 9-Bump Thin DSBGA Package

Large Bump (0.4 mm Pitch)

Package Number YFQ0009

PIN DESCRIPTIONS

Pin #

Name

Description

A1

VCON

A2

SGND

Signal ground for analog and control circuitry.

A3

PGND

Power ground for the Power MOSFETs and gate drive circuitry

Enable Input. Set this digital input high for normal operation. For shutdown, set low. Do not leave

B1

EN

EN pin floating.

B2

NC

Do not connect to PGND directly — Internally connected to SGND.

Switching Node connection to the internal PFET switch and NFET synchronous rectifier. Connect

B3

SW

to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current

Limit specification of the LM3242.

Bypass Enable input. Set this digital input high to force bypass operation. For normal operation

C1

BPEN

with automatic bypass, set low or connect to ground. Do not leave this pin floating.

Feedback Analog Input and Bypass FET output. Connect to the output at the output filter

C2

FB

capacitor.

C3

VIN

Voltage supply input for SMPS converter.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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