ams Datasheet

Page 13

[v2-03] 2014-Jul-31

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AS5050A − SPI Interface

Figure 13:

SPI Timing

Note(s) and/or Footnote(s):

1. If the previous command was a READ ANGLE command (0x3FFF) a minimum time of readout has to be waited before sending a next

READ ANGLE command. (see “Operating Modes” on page 10)

SPI Wire Mode Selection

The SPI interface can be set in two different modes: 3-wire mode

or 4-wire mode.

Figure 14:

Wire Mode Selection

Parameter

Description

Min

Max

Unit

Time between CSn falling edge and CLK rising edge

50

ns

Serial clock period

100

ns

Low period of serial clock

50

ns

High period of serial clock

50

ns

Time between last falling edge of CLK and rising edge

of CSn

50

ns

High time of CSn between two transmissions (1)

50

ns

Data input valid to falling clock edge

20

ns

CLK edge to data output valid

35

ns

Release bus time after CS rising edge.

50

ns

WM (Pin 14)

Connection option

03-wire mode

14-wire-mode