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WM8580AGEFTV データシート(PDF) 75 Page - Wolfson Microelectronics plc

部品番号 WM8580AGEFTV
部品情報  Multichannel CODEC with S/PDIF Transceiver
PDF  106 Pages
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メーカー  WOLFSON [Wolfson Microelectronics plc]
ホームページ  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8580AGEFTV データシート(HTML) 75 Page - Wolfson Microelectronics plc

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Production Data
WM8580A
w
PD, Rev 4.9, November 2013
75
INTERNAL POWER ON RESET CIRCUIT
Figure 40 Internal Power On Reset Circuit Schematic
The WM8580A includes an internal Power-On Reset Circuit, which is used to reset the digital logic
into a default state after power up.
Figure 40 shows a schematic of the internal POR circuit. The POR circuit is powered from AVDD. The
circuit monitors DVDD and VMID and asserts PORB low if DVDD or VMID are below the minimum
threshold Vpor_off.
On power up, the POR circuit requires AVDD to be present to operate. PORB is asserted low until
AVDD, DVDD and VMID voltages have risen above their reset thresholds. When these three
conditions have been met, PORB is released high. When PORB is released high, all registers are in
their default state and writes to the digital interface may take place.
On power down, PORB is asserted low whenever DVDD or VMID drop below the minimum threshold
Vpor_off.
If AVDD is removed at any time, the internal Power On Reset circuit is powered down and the PORB
output will follow the AVDD voltage.
In most applications, the time required for the device to release PORB high will be determined by the
charge time of the VMID node.



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