AT28C64(X)

2

The AT28C64 is accessed like a Static RAM for the read or

write cycles without the need for external components. Dur-

ing a byte write, the address and data are latched inter-

nally, freeing the microprocessor address and data bus for

other operations. Following the initiation of a write cycle,

the device will go to a busy state and automatically clear

and write the latched data using an internal control timer.

The device includes two methods for detecting the end of a

write cycle, level detection of RDY/BUSY (unless pin 1 is

N.C.) and DATA Polling of I/O

cycle has been detected, a new access for a read or write

can begin.

The CMOS technology offers fast access times of 120 ns at

low power dissipation. When the chip is deselected the

standby current is less than 100 µA.

Atmel’s AT28C64 has additional features to ensure high

quality and manufacturability. The device utilizes error cor-

rection internally for extended endurance and for improved

data retention characteristics. An extra 32 bytes of

EEPROM are available for device identification or tracking.

Block Diagram

Absolute Maximum Ratings*

Temperature under Bias ................................ -55°C to +125°C

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability

Storage Temperature ..................................... -65°C to +150°C

All Input Voltages (including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to V

Voltage on OE and A9

with Respect to Ground ...................................-0.6V to +13.5V