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GMS90C320PL40 データシート(PDF) 34 Page - Hynix Semiconductor

部品番号 GMS90C320PL40
部品情報  HYNIX SEMICONDUCTOR INC. 8-BIT SINGLE-CHIP MICROCONTROLLERS
PDF  46 Pages
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メーカー  HYNIX [Hynix Semiconductor]
ホームページ  http://www.skhynix.com/kor/main.do
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GMS90C320PL40 データシート(HTML) 34 Page - Hynix Semiconductor

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GMS90C320
30
OCT. 2000 Ver 1.2
AC Characteristics for 24MHz version
External Program Memory Characteristics
VCC=5V:
VCC=5V + 10%, −15%; VSS=0V; TA=0°Cto 70°C
(CL for port 0. ALE and PSEN outputs = 100pF; CL for all other outputs = 80pF)
VCC=3.3V:
VCC=3.3V + 0.3V, −0.6V; VSS=0V; TA=0°Cto 70°C
(CL for port0.ALE and PSEN outputs = 50pF; CL for all other outputs = 50pF)
Variable clock:
Vcc = 5V: 1/tCLCL =3.5 MHz to24MHz
Vcc = 3.3V: 1/tCLCL =1 MHz to 24 MHz
Parameter
Symbol
24 MHz Oscillator
Variable Oscillator
1/tCLCL =3.5 to 24MHz
Unit
Min.
Max.
Min.
Max.
ALE pulse width
tLHLL
43
-
2tCLCL-40
-
ns
Address setup to ALE
tAVLL
17
-
tCLCL-25
-
ns
Address hold after ALE
tLLAX
17
-
tCLCL-25
-
ns
ALE low to valid instruction in
tLLIV
-80
-
4tCLCL-87
ns
ALE to PSEN
tLLPL
22
-
tCLCL-20
-
ns
PSEN pulse width
tPLPH
95
-
3tCLCL-30
-
ns
PSEN to valid instruction in
tPLIV
-60
-
3tCLCL-65
ns
Input instruction hold after PSEN
tPXIX
0-
0
-
ns
Input instruction float after PSEN
tPXIZ1)
1)
Interfacing the GMS90C320 to devices with float times up to 35 ns is permissible. This limited bus contention will not cause
any damage to port 0 Drivers.
-32
-
tCLCL-10
ns
Address valid after PSEN
tPXAV1)
37
-
tCLCL-5
-
ns
Address to valid instruction in
tAVIV
-148
-
5tCLCL-60
ns
Address float to PSEN
tAZPL
-10
-
-10
-
ns



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