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ICS508M データシート(PDF) 2 Page - Integrated Circuit Systems |
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ICS508M データシート(HTML) 2 Page - Integrated Circuit Systems |
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2 / 5 page ![]() ICS508 PECL to CMOS Converter MDS 508 C 2 Revision 012400 Printed 11/13/00 Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com PRELIMINARY INFORMATION Pin Assignment 18 2 3 4 7 6 5 VDDP PECLIN GND VDDC CLK GND OE Number Name Type Description 1 VDDP O Connect to 3.3 V or 5 V. Supplies PECL input buffer. 2 I Complementary PECL clock input. 3 PECLIN I PECL clock input. 4 GND P Connect to ground. 5 OE I Output enable. Tri-states CLK output when low. Internal pull-up to VDDC. 6 GND P Connect to ground. 7 CLK O Clock output. 8 VDDC P Connect to 2.5 V, or 3.3 V or 5 V. Supplies output buffer and OE pin. Pin Descriptions Key: I = Input, O = output, P = power supply connection PECLIN PECLIN |
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