データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

Preview PDF HTML

ICS9250-16 データシート(PDF) 2 Page - Integrated Circuit Systems

部品番号 ICS9250-16
部品情報  Frequency Generator & Integrated Buffers for Celeron & PII/III?
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  ICST [Integrated Circuit Systems]
ホームページ  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9250-16 データシート(HTML) 2 Page - Integrated Circuit Systems

  ICS9250-16 Datasheet HTML 1Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 2Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 3Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 4Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 5Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 6Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 7Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 8Page - Integrated Circuit Systems ICS9250-16 Datasheet HTML 9Page - Integrated Circuit Systems Next Button
Zoom Inzoom in Zoom Outzoom out
 2 / 17 page
background image
2
ICS9250-16
The ICS9250-16 is a single chip clock solution for 810/810E type
chipset. It provides all necessary clock signals for such
a system.
Spread spectrum may be enabled through I2C programming. Spread
spectrum typically reduces EMI by 8dB to 10 dB. This simplifies
EMI qualification without resorting to board design iterations or
costly shielding. The ICS9250-16 employs a proprietary closed
loop design, which tightly controls the percentage of spreading
over process and temperature variations.
General Description
Pin Configuration
R
E
B
M
U
N
N
I
PE
M
A
N
N
I
PE
P
Y
TN
O
I
T
P
I
R
C
S
E
D
1
2
S
FN
I
y
t
i
l
a
n
o
i
t
c
n
u
f
t
u
p
t
u
o
l
l
a
,
y
c
n
e
u
q
e
r
f
U
P
C
s
e
n
i
m
r
e
t
e
D
.
n
i
p
t
c
e
l
e
S
n
o
i
t
c
n
u
F
K
0
5
h
t
i
w
(
W
.
)
n
w
o
d
-
l
l
u
p
0
F
E
RT
U
O.
t
u
p
t
u
o
k
c
o
l
c
e
c
n
e
r
e
f
e
r
z
H
M
8
1
3
.
4
1
,
V
3
.
3
31
XN
I
k
c
a
b
d
e
e
f
d
n
a
)
F
p
3
3
(
p
a
c
d
a
o
l
l
a
n
r
e
t
n
i
s
a
h
,
t
u
p
n
i
l
a
t
s
y
r
C
2
X
m
o
r
f
r
o
t
s
i
s
e
r
42
XT
U
O
d
a
o
l
l
a
n
r
e
t
n
i
s
a
H
.
z
H
M
8
1
3
.
4
1
y
l
l
a
n
i
m
o
n
,
t
u
p
t
u
o
l
a
t
s
y
r
C
)
F
p
3
3
(
p
a
c
,
3
2
,
7
1
,
4
1
,
6
,
5
7
4
,
1
4
,
5
3
,
4
2
)
5
:
0
(
D
N
GR
W
Py
l
p
p
u
s
V
3
.
3
r
o
f
s
n
i
p
d
n
u
o
r
G
7
,
8]
0
:
1
[
6
6
V
3T
U
OB
U
H
r
o
f
s
t
u
p
t
u
o
k
c
o
l
c
z
H
M
6
6
d
e
x
i
F
V
3
.
3
,
1
2
,
0
1
,
9
,
2
4
4
,
8
3
,
3
3
,
7
2
,
2
2
)
5
:
0
(
D
D
VR
W
Py
l
p
p
u
s
r
e
w
o
p
V
3
.
3
,
6
1
,
8
1
,
9
1
,
0
2
1
1
,
2
1
,
3
1
,
5
1
]
0
:
7
[
K
L
C
I
C
PT
U
OS
K
L
C
U
P
C
s
u
o
n
o
r
h
c
n
y
S
h
t
i
w
,
s
t
u
p
t
u
o
k
c
o
l
c
I
C
P
V
3
.
3
6
2
,
5
2)
1
:
0
(
z
H
M
8
4T
U
OB
S
U
r
o
f
s
t
u
p
t
u
o
k
c
o
l
c
z
H
M
8
4
d
e
x
i
F
V
3
.
3
9
2
,
8
2)
1
:
0
(
S
FN
I
.
y
t
i
l
a
n
o
i
t
c
n
u
f
t
u
p
t
u
o
l
l
a
,
y
c
n
e
u
q
e
r
f
U
P
C
s
e
n
i
m
r
e
t
e
D
.
s
n
i
p
t
c
e
l
e
S
n
o
i
t
c
n
u
F
.
3
e
g
a
p
n
o
e
l
b
a
t
y
t
i
l
a
n
o
i
t
c
n
u
F
o
t
r
e
f
e
r
e
s
a
e
l
P
0
3A
T
A
D
SN
II
r
o
f
t
u
p
n
i
a
t
a
D
2
.
t
u
p
n
i
l
a
i
r
e
s
C
1
3K
L
C
SN
II
f
o
t
u
p
n
i
k
c
o
l
C
2
t
u
p
n
i
C
2
3#
D
PN
I
o
t
n
i
e
c
i
v
e
d
e
h
t
n
w
o
d
r
e
w
o
p
o
t
d
e
s
u
n
i
p
t
u
p
n
i
w
o
l
e
v
i
t
c
a
s
u
o
n
o
r
h
c
n
y
s
A
d
n
a
O
C
V
e
h
t
d
n
a
d
e
l
b
a
s
i
d
e
r
a
s
k
c
o
l
c
l
a
n
r
e
t
n
i
e
h
T
.
e
t
a
t
s
r
e
w
o
p
w
o
l
a
e
b
t
o
n
l
l
i
w
n
w
o
d
r
e
w
o
p
e
h
t
f
o
y
c
n
e
t
a
l
e
h
T
.
d
e
p
p
o
t
s
e
r
a
l
a
t
s
y
r
c
e
h
t
.
s
m
3
n
a
h
t
r
e
t
a
e
r
g
,
0
4
,
9
3
,
7
3
,
6
3
6
4
,
5
4
,
3
4
,
2
4
]
0
:
7
[
M
A
R
D
ST
U
O
f
f
o
d
e
n
r
u
t
e
b
n
a
c
s
t
u
p
t
u
o
M
A
R
D
S
l
l
A
.
z
H
M
0
0
1
g
n
i
n
n
u
r
t
u
p
t
u
o
V
3
.
3
I
h
g
u
o
r
h
t
2C
4
3F
_
M
A
R
D
ST
U
OI
h
g
u
o
r
h
t
f
f
o
d
e
n
r
u
t
e
b
t
o
n
n
a
c
,
M
A
R
D
S
z
H
M
0
0
1
g
n
i
n
n
u
r
e
e
r
f
V
3
.
3
2C
8
4
,
6
5]
0
:
1
[
L
D
N
GR
W
PC
I
P
A
&
U
P
C
r
o
f
y
l
p
p
u
s
r
e
w
o
p
V
5
.
2
r
o
f
d
n
u
o
r
G
2
5
,
0
5
,
9
4]
0
:
2
[
K
L
C
U
P
CT
U
O
g
n
i
d
n
e
p
e
d
z
H
M
3
3
1
r
o
z
H
M
0
0
1
,
z
H
M
6
6
.
t
u
p
t
u
o
k
c
o
l
c
s
u
b
t
s
o
H
V
5
.
2
.
s
n
i
p
)
2
:
0
(
S
F
n
o
3
5
,
1
5)
1
:
0
(
L
D
D
VR
W
PC
I
P
A
O
I
&
U
P
C
r
o
f
y
l
p
p
u
s
r
e
w
o
p
V
5
.
2
5
5
,
4
5]
0
:
1
[
C
I
P
A
O
IT
U
O.
z
H
M
3
.
3
3
t
a
g
n
i
n
n
u
r
s
t
u
p
t
u
o
k
c
o
l
c
V
5
.
2
Power Groups
VDD0, GND0 = REF & Crystal
VDD1, GND1 = 3V66 (0:1)
VDD2, GND2 = PCICLK(0:7)
VDD3, GND3 = PLL core
VDD4, GND4 = 48MHz (0:1)
VDD5, GND5 = SDRAM_F, SDRAM (0:7)
VDDL0, GNDL0 = CPUCLK (0:2)
VDDL1, GNDL1 = IOAPIC (0:1)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか？  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com