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7429FCT52ATLB データシート(PDF) 6 Page - Integrated Device Technology

部品番号 7429FCT52ATLB
部品情報  FAST CMOS OCTAL REGISTERED TRANSCEIVERS
PDF  8 Pages
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メーカー  IDT [Integrated Device Technology]
ホームページ  http://www.idt.com
Logo IDT - Integrated Device Technology

7429FCT52ATLB データシート(HTML) 6 Page - Integrated Device Technology

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IDT29FCT52AT/BT/CT/DT, IDT29FCT/2052AT/BT/CT, IDT29FCT53AT/BT/CT
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.1
6
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
29FCT52AT/53AT
29FCT2052AT
29FCT52BT/53BT
29FCT2052BT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
Propagation Delay
CPA, CPB to An, Bn
CL = 50pF
RL = 500
Ω
2.0
10.0
2.0
11.0
2.0
7.5
2.0
8.0
ns
tPZH
tPZL
Output Enable Time
OEA or OEB to An, Bn
1.5
10.5
1.5
13.0
1.5
8.0
1.5
8.5
ns
tPHZ
tPLZ
Output Disable Time
OEA or OEB to An, Bn
1.5
10.0
1.5
10.0
1.5
7.5
1.5
8.0
ns
tSU
Set-up Time, HIGH or LOW
An, Bn to CPA, CPB
2.5
—
2.5
—
2.5
—
2.5
—
ns
tH
Hold Time, HIGH or LOW
An, Bn to CPA, CPB
2.0
—
2.0
—
1.5
—
1.5
—
ns
tSU
Set-up Time, HIGH or LOW
CEA, CEB to CPA, CPB
3.0
—
3.0
—
3.0
—
3.0
—
ns
tH
Hold Time, HIGH or LOW
CEA, CEB to CPA, CPB
2.0
—
2.0
—
2.0
—
2.0
—
ns
tW
Clock Pulse Width HIGH or
LOW(3)
3.0
—
3.0
—
3.0
—
3.0
—
ns
2629 tbl 10
NOTES:
2629 tbl 11
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
29FCT52CT/53CT
29FCT2052CT
29FCT52DT
Com'l.
Mil.
Com'l.
Mil.
Symbol
Parameter
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
tPLH
tPHL
Propagation Delay
CPA, CPB to An, Bn
CL = 50pF
RL = 500
Ω
2.0
6.3
2.0
7.3
2.0
4.5
—
—
ns
tPZH
tPZL
Output Enable Time
OEA or OEB to An, Bn
1.5
7.0
1.5
8.0
1.5
5.6
—
—
ns
tPHZ
tPLZ
Output Disable Time
OEA or OEB to An, Bn
1.5
6.5
1.5
7.5
1.5
4.3
—
—
ns
tSU
Set-up Time, HIGH or LOW
An, Bn to CPA, CPB
2.5
—
2.5
—
1.5
—
—
—
ns
tH
Hold Time, HIGH or LOW
An, Bn to CPA, CPB
1.5
—
1.5
—
1.0
—
—
—
ns
tSU
Set-up Time, HIGH or LOW
CEA, CEB to CPA, CPB
3.0
—
3.0
—
2.0
—
—
—
ns
tH
Hold Time, HIGH or LOW
CEA, CEB to CPA, CPB
2.0
—
2.0
—
1.0
—
—
—
ns
tW
Clock Pulse Width HIGH or
LOW(3)
3.0
—
3.0
—
3.0
—
—
—
ns



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