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80C196KB データシート(PDF) 17 Page - Intel Corporation |
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80C196KB データシート(HTML) 17 Page - Intel Corporation |
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17 / 22 page  8XC196KB8XC196KB16 10-BIT AD CHARACTERISTICS At a clock speed of 6 MHz or less the clock prescal- er should be disabled This is accomplished by set- ting IOC24 e 1 At higher frequencies (greater than 6 MHz) the clock prescaler should be enabled (IOC24 e 0) to allow the comparator to settle The table below shows two different clock speeds and their corresponding AD conversion and sample times State times are calculated as follows state time e 2 XTAL1 The converter is ratiometric so the absolute accura- cy is directly dependent on the accuracy and stability of VREF VREF must be close to VCC since it supplies both the resistor ladder and the digital section of the converter See the MCS-96 AD Converter Quick Reference for definition of AD terms Example Sample and Conversion Times Sample Time Conversion Conversion AD Clock Clock Speed Sample Time at Clock Time Time at Prescaler (MHz) (States) Speed (States) Clock Speed (ms) (ms) IOC24 e 0 x ON 16 15 1875 1565 196 IOC24 e 1 x OFF 6 8 2667 895 298 AD CONVERTER SPECIFICATIONS Parameter Typical(1) Minimum Maximum Units Notes Resolution 1024 1024 Levels 10 10 Bits Absolute Error 0 g 3 LSBs Full Scale Error 025 g050 LSBs Zero Offset Error 025 g050 LSBs Non-Linearity Error 15 g25 0 g 3 LSBs Differential Non-Linearity Error l b 1 a 2 LSBs Channel-to-Channel Matching g 01 0 g 1 LSBs Repeatability g 025 LSBs Temperature Coefficients Offset 0009 LSB C Full Scale 0009 LSB C Differential Non-Linearity 0009 LSB C Off Isolation b 60 dB 2 3 Feedthrough b 60 dB 2 VCC Power Supply Rejection b 60 dB 2 Input Series Resistance 750 12K X 4 DC Input Leakage 0 g 30 m A Sampling Capacitor 3 pF NOTES An ‘‘LSB’’ as used here has a value of approximately 5 mV 1 Typical values are expected for most devices at 25 C 2 DC to 100 KHz 3 Multiplexer Break-Before-Make Guaranteed 4 Resistance from device pin through internal MUX to sample capacitor 17 |
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