8XC196KD8XC196KD20

Symbol

Name and Function

Port 0

8-bit high impedance input-only port These pins can be used as digital inputs andor as

analog inputs to the on-chip AD converter

Port 1

8-bit quasi-bidirectional IO port

Port 2

8-bit multi-functional port All of its pins are shared with other functions in the 8XC196KD

Pins 26 and 27 are quasi-bidirectional

Ports 3 and 4

8-bit bidirectional IO ports with open drain outputs These pins are shared with the

multiplexed addressdata bus which has strong internal pullups

HOLD

Bus Hold input requesting control of the bus

HLDA

Bus Hold acknowledge output indicating release of the bus

BREQ

Bus Request output activated when the bus controller has a pending external memory

cycle

PMODE

Determines the EPROM programming mode

PACT

A low signal in Auto Programming mode indicates that programming is in process A high

signal indicates programming is complete

PALE

A falling edge in Slave Programming Mode and Auto Configuration Byte Programming

Mode indicates that ports 3 and 4 contain valid programming addresscommand

information (input to slave)

PROG

A falling edge in Slave Programming Mode indicates that ports 3 and 4 contain valid

programming data (input to slave)

PVER

A high signal in Slave Programming Mode and Auto Configuration Byte Programming

Mode indicates the byte programmed correctly

CPVER

Cummulative Program Output Verification Pin is high if all locations have programmed

correctly since entering a programming mode

AINC

Auto Increment Active low input enables the auto increment mode Auto increment allows

reading or writing sequential EPROM locations without address transactions across the

PBUS for each read or write

9