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HIP2060AS2 データシート(PDF) 3 Page - Intersil Corporation |
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HIP2060AS2 データシート(HTML) 3 Page - Intersil Corporation |
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3 / 8 page ![]() 3 Turn-On Delay Time (Note 5) td(ON) VDD = 30V, RL = 3Ω ID = 10A, VGS = 10V, RG = 50Ω See Figure 14 - 4 - ns Rise Time (Note 5) tr - 5 - ns Turn-Off Delay Time (Note 5) td(OFF) -12 - ns Fall Time (Note 5) tf -6 - ns Total Gate Charge (Note 5) Qg(TOT) VDS = 50V, VGS = 10V, ID = 10A See Figures 16 and 17 - 10.5 12.0 nC Gate-Source Charge (Note 5) Qgs - 1.4 2.0 nC Gate-Drain Charge (Note 5) Qgd - 4.9 5.5 nC Short-Circuit Input Capacitance, Common Source CISS VDS = 25V, VGS = 0V, f = 1MHz - 230 - pF Short-Circuit Output Capacitance, Common Source for Upper FET COSS(U) - 150 - pF Short Circuit Output Capacitance Common Source for Lower FET COSS(L) - 225 - pF Short-Circuit Reverse Transfer Capacitance, Common Source CRSS -40 - pF Thermal Resistance Junction to Case RθJC - - 2.7 oC/W Thermal Resistance Junction to Ambient RθJA - - 60 oC/W Electrical Specifications TC = 25 oC, Unless Otherwise Specified (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Source-Drain Diode Specifications PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS SOURCE-TO-DRAIN DIODE SPECIFICATIONS (Across Z1 and Z2) Forward Voltage (Note 4) VSD ISD = 10A, VGS = 0V - 1.05 1.25 V Reverse Recovery Time (Across Z1) trr(S1-D1) ISD = 10A, dISD/dt = 100A/µs - 50 - ns Reverse Recovery Time (Across Z2) trr(S2-D2) ISD = 10A, dISD/dt = 100A/µs - 75 - ns SOURCE2-TO-DRAIN1 DIODE SPECIFICATIONS D (Across D1) Forward Voltage (Note 4) VSD ISD = 10A, VGS = 0V - 8.5 9.5 V Reverse Recovery Time trr ISD = 10A, dISD/dt = 100A/µs - 200 - ns DEVICE MATCHING Drain-Source On Resistance Match rDS(ON)M VGS = 10V, ID = 10A, TC = 25 oC- 90 - % NOTES: 4. Pulse test: Pulse Width ≤ 300µs, Duty Cycle ≤ 2%. 5. Independent of operating temperature. HIP2060 |
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