UM1488

Application work area

Doc ID 022451 Rev 2

13/17

Other calculated parameters are shown in the “Common” and in the “Phase Delay” groups:

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DC value of N-channel voltage input

●

line frequency

●

sum of RMS currents

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S to R and R to T phase delays.

All calculation formulas can be found in the AN3254 application note.

5.2

Status bits

There are four group-boxes (R-Phase status, S-Phase status, T-Phase status, Common

status) showing the device status bits contained in:

●

DAR register for R-Phase status

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DAS register for S-Phase status

●

DAT register for T-Phase status

●

DAP+DRP registers for Common status.

These bits are read only and are automatically updated every time the device is read.

5.3

Mode signals

The Mode signal group-box shows the device mode signals.

This is a read/write area: the mode signals are updated every time the device is read. To set

or clear these bits, the user should respectively check or uncheck the related check box,

then right click and click on the “Write” button. One mode signal is written at a time.

The mode signal check boxes are automatically updated every time the device is read.

Note:

When the user selects “Write SHL” (write to shadow memory) or “Write OTP” (write

permanently to OTP memory), the software manages, by itself, the mode signal to perform

these operations.

5.4

Configurators

In the configurators’ area all device configuration bits can be read and written.

These bits are automatically updated every time the device is read. To set or clear a

configuration bit, the user should respectively check or uncheck the related check box, then

use the button “Write SHL” or “Write OTP” from the Command area to respectively write

temporarily or permanently all the configurators.

Note:

All the configuration bits are written at the same time.

The TSTD bit is disabled and can be set only through the “Lock” button.

CHK bit is a read only bit.

If the PM bit is set, the bits are automatically arranged to append the calibrators' extenders

to the corresponding phase.