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AN3329 データシート(PDF) 28 Page - STMicroelectronics |
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AN3329 データシート(HTML) 28 Page - STMicroelectronics |
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28 / 47 page  Functional check AN3329 28/47 Doc ID 18376 Rev 1 Mains sags/dips Figure 56 and 57 show the converter behavior in the case of half-cycle (8.3 ms) or a complete cycle (16.6 ms) mains dip. As can be noted, in both cases the PFC output voltage drops but the L6599A still works correctly, and output voltages do not show any disturbance, therefore demonstrating a good immunity of the circuit against mains dips. Figure 56. Half cycle mains dip at full load and 115 Vac - 60 Hz Figure 57. Full cycle mains dip at full load and 115 Vac - 60 Hz CH3: 24 V output CH1: HB voltage CH2: PFC drain CH4: PFC gate CH3: 24 V output CH1: HB voltage CH2: PFC drain CH4: PFC gate |
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