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PM0222 データシート(PDF) 14 Page - STMicroelectronics |
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PM0222 データシート(HTML) 14 Page - STMicroelectronics |
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14 / 33 page  GPIO / IOs management PM0222 14/33 DocID025476 Rev 1 5.2 Pull activation Each I/O has a pull-up or a pull-down (fixed). This pull-up/down can be enabled or disabled through the GPIO_PE register (1 bit per I/O). The reset value for this register is 0x3F, meaning the pull (up or down) is enabled for all I/Os after reset. Table 6 indicates the direction of each I/O. 5.3 Shared I/Os at chip level (double bonding) For I²C peripherals there is a double bonding configuration through the I2C_CONF register, see Section 10.4: I2C double bonding. Table 6. IO pull direction Pad reference Pull IO0 Down IO1 Down IO2 Up IO3 Down IO4 Down IO5 Down IO6 Down IO7 Up IO8 Up IO9 Up IO10 Down |
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