AN3181

Class B solution structure

Doc ID 17286 Rev 2

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Figure 11.

Periodic run mode self test initialization structure

4.4

Detailed description of periodic run mode self tests

4.4.1

Run time self tests structure

Run time self tests are performed periodically, their period is based on time base interrupt

settings. Before the first run, all tests must be initialized by run mode initialization routine

(refer to Figure 4). All tests are performed in the main loop level except partial transparent

RAM test, which is executed during the time base interrupt service. Some tests (analog,

communication peripherals and application interrupts) are not automatically included.

Depending on device capability and application needs, the user could implement them. The

following is the list of the run mode self tests:

●

CPU core partial run mode test

●

Stack boundaries overflow test

●

Clock run mode test

●

AD MUX self test (not implemented)

●

Interrupt rate test (not implemented)

●

communication peripherals test (not implemented)

●

Flash partial CRC test including evaluation of the complete test

●

IWDG and WWDG refresh

●

Partial transparent RAM March C-/X test (under system interrupt scope)