Application example

AN4646

14/17

DocID027369 Rev 1

TIM2 slave timer is running at:

•

(TIM1 frequency)/ (TIM2 period + 1) = 32.815 KHz

•

The duty cycle is equal to TIM2_CCR1/ (TIM2_ARR + 1) = 30%

TIM3 slave timer is running at:

•

(TIM1 frequency)/ (TIM3 period + 1) = 65.630 KHz

•

The duty cycle is equal to: TIM3_CCR1/ (TIM3_ARR + 1) = 60%

Table 3: Peripheral interconnect configuration detail gives code examples to configure TIM1,

TIM2 and TIM3 as described above.

Table 3. Peripheral interconnect configuration detail

Interconnect

Example

Comments

TIM1 master

timer

sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE

sMasterConfig.MasterSlaveMode =

TIM_MASTERSLAVEMODE_ENABLE;

HAL_TIMEx_MasterConfigSynchronization(&htim1,

&sMasterConfig);

Configures TIM2

Update event as

Trigger Output

TIM2 slave

timer

sSlaveConfig.SlaveMode = TIM_SLAVEMODE_GATED;

sSlaveConfig.InputTrigger = TIM_TS_ITR0;

HAL_TIM_SlaveConfigSynchronization(&htim2,

&sSlaveConfig);

sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;

sMasterConfig.MasterSlaveMode=TIM_MASTERSLAVEMODE_DIS

ABLE;

HAL_TIMEx_MasterConfigSynchronization(&htim2,

&sMasterConfig);

Configures ITR0 as

trigger input for both

slaves.

Enables the Gated

mode so that the

start/stop of slave

counters is controlled

by the master trigger

output signal (update

event).

TIM3 slave

timer

sSlaveConfig.SlaveMode = TIM_SLAVEMODE_GATED;

sSlaveConfig.InputTrigger = TIM_TS_ITR0

;

HAL_TIM_SlaveConfigSynchronization(&htim3,

&sSlaveConfig);

sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;

sMasterConfig.MasterSlaveMode=TIM_MASTERSLAVEMODE_DIS

ABLE;

HAL_TIMEx_MasterConfigSynchronization(&htim2,

&sMasterConfig);