PYA28C010 - 128K x 8 EEPROM

Page 3

Document # EEPROM103 REV 03

3-byte command sequence will start the internal write timers.

No data will be written to the device; however, for the duration of

tWC, read operations will effectively be polling operations.

DEVICE IDEnTIFICATIOn

An extra 128-bytes of EEPROM memory are available to the

user for device identification. By raising A9 to 12V ± 0.5V and

using address locations 1FF80H to 1FFFFH the bytes may be

written to or read from in the same manner as the regular mem-

ory array.

OPTIOnAL CHIP ERASE MODE

The entire device can be erased using a 6-byte software

code. Please see "Software Chip Erase" application note

at the end of this datasheet for details.