ZL6105ALAF datasheet(21/35 Pages) INTERSIL

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ZL6105

FN6906.5

December 19, 2013

Loop Compensation

The ZL6105 operates as a voltage-mode synchronous buck

controller with a fixed frequency PWM scheme. Although the

ZL6105 uses a digital control loop, it operates much like a

traditional analog PWM controller. Figure 13 is a simplified block

diagram of the ZL6105 control loop, which differs from an

analog control loop only by the constants in the PWM and

compensation blocks. As in the analog controller case, the

compensation block compares the output voltage to the desired

voltage reference and compensates to keep the loop stable. The

resulting integrated error signal is used to drive the PWM logic,

converting the error signal to a duty cycle to drive the external

MOSFETs.

The ZL6105 has an auto compensation feature that measures

the characteristics of the power train and calculates the proper

tap coefficients. Auto compensation is configured using the FC0

and FC1 pins as shown in Table 16 and Table 17.

When auto compensation is enabled, the routine can be set to

execute one time after ramp or periodically while regulating.

Note that the Auto Compensation feature requires a minimum

TON_DELAY as described in “Soft-Start Delay and Ramp Times”

on page 14.

If the device is configured to store auto comp values, the

calculated compensation values will be saved in the Auto Comp

Store and may be read back through the PID_TAPS command. If

repeat mode is enabled, the first Auto Comp results after the first

ramp will be stored; the values calculated periodically are not

stored in the Auto Comp Store. When compensation values are

saved in the Auto Comp Store, the device will use those

compensation values on subsequent ramps. In repeat mode, the

latest Auto Comp results will always be used during operation.

Stored Auto Comp results can only be cleared by disabling Auto

Comp Store, which is not permitted while the output is enabled.

However, sending the AUTOCOMP_CONTROL command while

enabled in Store mode will cause the next results to be stored,

overwriting previously stored values. If auto compensation is

disabled, the device will use the compensation parameters that

are stored in the DEFAULT_STORE or USER_STORE.

If the PG Assert parameter is set to "Use PG Delay," PG will be asserted

according to the POWER_GOOD_DELAY command, after which Auto

Comp will begin. When Auto Comp is enabled, the user must not

program a Power-Good Delay that will expire before the ramp is

finished. If PG Assert is set to "After Auto Comp," PG will be asserted

immediately after the first Auto Comp cycle completes

(POWER_GOOD_DELAY will be ignored).

The Auto Comp Gain control scales the Auto Comp results to

allow a trade-off between transient response and steady-state

duty cycle jitter. A setting of 100% will provide the fastest

transient response while a setting of 10% will produce the lowest

jitter.

Note that if Auto Comp is enabled, for best results Vin must be

stable before Auto Comp begins, as shown in Equation 31.

The auto compensation function can also be configured via the

AUTO_COMP_CONFIG command and controlled using the

AUTO_COMP_CONTROL command over the I2C/SMBus interface.

Please refer to Application Note AN2033 for further details.

1-D

VIN

VOUT

DPWM

Compensation

FIGURE 13. CONTROL LOOP BLOCK DIAGRAM

TABLE 16. FC0 PIN-STRAP SETTINGS

FC0 PIN

STORE VALUES

SINGLE/REPEAT

PG ASSERT

LOW

Auto Comp Disabled

OPEN

Not Stored

Single

After Auto Comp

HIGH

Store in Flash

Single

After Auto Comp

10kΩ

Not Stored

Single

After Auto Comp

11kΩ

Store in Flash

12.1kΩ

Not Stored

Repeat ~1 sec

13.3kΩ

Store in Flash

14.7kΩ

Not Stored

Single

After PG Delay

16.2kΩ

Store in Flash

17.8kΩ

Not Stored

Repeat ~1 sec

19.6kΩ

Store in Flash

21.5kΩ

Not Stored

Single

After Auto Comp

23.7kΩ

Store in Flash

26.1kΩ

Not Stored

Repeat ~1 min

28.7kΩ

Store in Flash

31.6kΩ

Not Stored

Single

After PG Delay

34.8kΩ

Store in Flash

38.3kΩ

Not Stored

Repeat ~1 min

42.2kΩ

Store in Flash

ΔVin

VinNom

---------------------

in%

()

100%

256 Vout

•

VinNom

-----------------------------

---------------------------------------

≤

(EQ. 31)

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