Ground

IN

OUT

SD

SENSE

Input

Capacitor

Output

Capacitor

Pull-up

Resistor

Ground

IN

OUT

SD

ERROR

Input

Capacitor

Output

Capacitor

Pull-up

Resistor

Pull-up

Resistor

LP3852, LP3855

SNVS174I – FEBRUARY 2003 – REVISED FEBRUARY 2015

www.ti.com

12 Layout

12.1 Layout Guidelines

Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.

The input and output capacitors must be directly connected to the IN, OUT, and ground pins of the regulator

using traces which do not have other currents flowing in them (Kelvin connect).

pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its

capacitors have a "single point ground".

It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane

were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground

potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground

technique for the regulator and its capacitors fixed the problem.

Since high current flows through the traces going into IN and coming from OUT, Kelvin connect the capacitor

leads to these pins so there is no voltage drop in series with the input and output capacitors.

12.2 Layout Example

Figure 24. LP3852 TO-263 Package Typical Layout

Figure 25. LP3855 TO-263 Package Typical Layout

18

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