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ML4658CP データシート(PDF) 2 Page - Micro Linear Corporation

部品番号 ML4658CP
部品情報  10BASE-T Transceiver
PDF  17 Pages
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メーカー  MICRO-LINEAR [Micro Linear Corporation]
ホームページ  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML4658CP データシート(HTML) 2 Page - Micro Linear Corporation

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ML4658
2
PIN# NAME
FUNCTION
1
CLSN
Indicates that a collision is taking place. Active low LED driver, open collector. Event is extended
100ms for visibility.
2
COL+
Gated 10MHz signal used to indicate a collision, SQE test, or jabber. Balanced differential
3
COL–
line driver outputs that meet AU interface specifications. AC or DC coupled.
4
SQEN/LTD/ SQE Test Enable, Link Test Disabled, Jabber Disabled. This input uses four voltage levels to
JABD
configure the chip as shown in Table 1.
Table 1. SQEN/LTD/JABD Pin Configuration
Pin
SQE Test
Link Test
Jabber
0V (GND)
Disabled
Enabled
Enabled
1.2V
Disabled
Disabled
Disabled
BIAS
Enabled
Disabled
Enabled
5V (VCC)
Enabled
Enabled
Enabled
When link test is disabled, no link pulses are transmitted, and the transmitter and receiver will not be
disabled as a result of a loss of receive link pulses. When Jabber is disabled the transmitter can
transmit continuously without interruption, and the collision oscillator will not be activated.
5
Rx+
Manchester encoded receive data output to the local device. Balanced differential line driver outputs
6
Rx–
that meet AU interface specifications. AC or DC coupled.
7VCC
5 Volt power input.
8
Tx+
Balanced differential line receiver inputs that meet AU interface specifications. These inputs may be
9
Tx–
AC or DC coupled. When AC coupled, the BIAS pin is used to set the common mode voltage. Signals
meeting the transmitter squelch input requirements are pre-equalized and output on TxTP+ and TxTP–.
10 RTSET
When using 100
Ω unshielded twisted pair, a 220Ω resistor is tied between this pin and VCC. When
using 150
Ω shielded twisted pair, a 330Ω resistor is tied between this pin and VCC.
11 RRSET
A 1% 61.9K
Ω resistor tied from this pin to VCC is used for internal biasing.
PIN DESCRIPTION (DIP)
PIN CONFIGURATION
TOP VIEW
1
2
3
4
5
6
7
8
9
10
11
12
JAB
BIAS
RxTP+
RxTP–
LTF
TxCAP0
TxCAP1
GND
TxTP+
TxTP–
RCV
XMT
24
23
22
21
20
19
18
17
16
15
14
13
CLSN
COL+
COL–
SQEN/LTD/JABD
Rx+
Rx–
VCC
Tx+
Tx–
RTSET
RRSET
POLRD
ML4658
24-Pin DIP
4
3
2
1
28
27 26
12 13 14 15 16
17 18
5
6
7
8
9
10
11
RxTP–
LTF
NC
TxCAP0
TxCAP1
GND
GND
25
24
23
22
21
20
19
NC
Rx+
Rx–
VCC
VCC
Tx+
Tx–
TOP VIEW
ML4658
28-Pin PCC



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