M24C64-DRDW3TP datasheet(39/40 Pages) STMICROELECTRONICS

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M24C64-A125

Revision history

Table 17. Document revision history

Date

Revision

Changes

23-Apr-2012

Initial release.

30-Jul-2012

Updated (modes), Section 3.5: Device addressing, Section 4.1.3:

Write Identification Page, Section 4.1.4: Lock Identification Page,

Section 4.2.1: Random Address Read, Section 4.2.2: Current

Address Read and Section 4.2.4: Read Identification Page.

Added Table 5: Address significant bits.

Deleted Table 4: Most significant address byte and Table 5: Least

significant address byte.

05-Mar-2013

Document reformatted.

Document status changed from “Preliminary data” to “Production

data”.

Updated:

– Section 3.6: Identification page

– Section 6: Delivery state

–ICC, VIL and VRES values in Table 10: DC characteristics

25-Mar-2013

Updated ICC1 and VIL rows in Table 10: DC characteristics.

26-Jul-2013

Replaced MLP8 (MC) by WFDFPN8 (MF) package.

Updated note (1) under Table 5: Absolute maximum ratings.

05-Sep-2013

Updated the third waveform in Figure 12: AC waveforms.

11-Feb-2014

Changed Data retention from “40 years at 55 °C” to “50 years at

125 °C” in Features.

Updated Figure 15: WFDFPN8 (MLP8) - 8-lead ultra thin fine pitch

dual flat no lead, package outline.

16-Dec-2014

Updated:

– note 2 on Table 5.

– Figure 5 and note 2 on Figure 5

– Table 15 and Table 16

Added sentence related Engineering Sample on Section 10

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