M24M02-DWMN3TP datasheet(20/38 Pages) STMICROELECTRONICS

部品番号	M24M02-DWMN3TP

部品情報	Automotive 2-Mbit serial IC bus EEPROM with 1 MHz clock

PDF	38 Pages

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メーカー	STMICROELECTRONICS [STMicroelectronics]

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20 / 38 page

Instructions

M24M02-A125

20/38

DocID027947 Rev 2

4.2

Read operations

Read operations are performed independently of the state of the Write Control (WC) signal.

After the successful completion of a Read operation, the device internal address counter is

incremented by one, to point to the next byte address.

Figure 8. Read mode sequences

4.2.1

Random Address Read

The Random Address Read is a sequence composed of a truncated Write sequence (to

define a new address pointer value, see Table 3) followed by a current Read.

The Random Address Read sequence is therefore the sum of [Start + Device Select code

with RW=0 + two address bytes] (without Stop condition, as shown in Figure 8)] and [Start

condition + Device Select code with RW=1]. The memory device acknowledges the

sequence and then outputs the contents of the addressed byte. To terminate the data

transfer, the bus master does not acknowledge the last data byte and then issues a Stop

condition.

M24M02-DWMN3TP データシート(PDF) 20 Page - STMicroelectronics