UT54ACTS899 datasheet(6/17 Pages) AEROFLEX

6 / 17 page

Notes:

* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition

A up to the maximum TID level procured.

1. All specifications valid for radiation dose

 1E5 rad(Si) per MIL-STD-883, Method 1019.

2. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, -

50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are

guaranteed to VIH(min) and VIL(max).

3. Not more than one output may be shorted at a time for maximum duration of one second.

4. Supplied as a design limit, but not guaranteed or tested.

5. Per MIL-PRF-38535, for current density

 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765

pF-MHz.

6. Transmission driving tests are performed at VDD = 5.5V, only one output loaded at a time with a duration not to exceed 2ms. The test is guaranteed, if not tested,

for VIN=VIH minimum or VIL maximum.

7. Power dissipation specified per switching output.

8. Guaranteed by characterization.

9. Power does not include power contribution of any CMOS output sink current.

10. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS

at frequency of 1MHz and a signal amplitude of 50mV rms maximum.

Ptotal

Power dissipation7, 8, 9

CL = 20pF

VDD from 4.5 to 5.5

1.0

mW/

MHz

IDDQ

Standby Supply Current VDD

Pre-Rad 25oC

Pre-Rad -55oC to +125oC

Post-Rad 25oC

VIN = VDD or VSS

VDD = 5.5

OE=VDD

160

A

I

DDQ

Quiescent Supply Current Delta, TTL in-

put level

Pre-Rad 25oC, Pre-Rad -55oC to +125oC

Post-Rad 25oC

For input under test

VIN = VDD - 2.1V

For other inputs

VIN = VDD or VSS

VDD = 5.5V

1.6

CIN

Input capacitance 10

 = 1MHz @ 0V

VDD from 4.5 to 5.5

COUT

Output capacitance10

 = 1MHz @ 0V

VDD from 4.5 to 5.5

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