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CLC5602IM データシート(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部品番号 CLC5602IM
部品情報  Dual, High Output, Video Amplifier
PDF  12 Pages
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メーカー  NSC [National Semiconductor (TI)]
ホームページ  http://www.national.com
Logo NSC - National Semiconductor (TI)

CLC5602IM データシート(HTML) 7 Page - National Semiconductor (TI)

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DC Coupled Single Supply Operation
Figures 1 and 2 show the recommended non-inverting
and inverting configurations for input signals that remain
above 0.8V DC.
Figure 1: Non-Inverting Configuration
Figure 2: Inverting Configuration
AC Coupled Single Supply Operation
Figures 3 and 4 show possible non-inverting and invert-
ing configurations for input signals that go below 0.8V
DC. The input is AC coupled to prevent the need for
level shifting the input signal at the source. The resistive
voltage divider biases the non-inverting input to VCC ÷2
= 2.5V (For VCC = +5V).
Figure 3: AC Coupled Non-Inverting Configuration
Figure 4: AC Coupled Inverting Configuration
Dual Supply Operation
The CLC5602 operates on dual supplies as well as
single supplies. The non-inverting and inverting configu-
rations are shown in Figures 5 and 6.
Figure 5: Dual Supply Non-Inverting Configuration
Figure 6: Dual Supply Inverting Configuration
7
http://www.national.com
+
-
1/2
CLC5602
Rf
0.1
µF
6.8
µF
Vo
Vin
Rg
Rt
3
2
4
8
1
V
V
A1
R
R
o
in
v
f
g
== +
+
Vcm
VCC
RL
Vcm
Note: Rt, RL and Rg are tied
to Vcm for minimum power
consumption and maximum
output swing.
Vcm
+
-
Rf
0.1
µF
6.8
µF
Vo
Vin
Rb
4
Rg
V
V
A
R
R
o
in
v
f
g
== −
+
Rt
3
2
Vcm
VCC
RL
Vcm
Note: Rb, provides DC bias
for non-inverting input.
Rb, RL and Rt are tied
to Vcm for minimum power
consumption and maximum
output swing.
Vcm
Select Rt to yield
desired Rin = Rt || Rg
+
-
1/2
CLC5602
8
1
+
-
Rf
0.1
µF
6.8
µF
Vo
Vin
Rg
R
4
C
Cc
R
+
VV
1
R
R
2.5
o
in
f
g
=+
 +
low frequency cutoff
1
2R C
, where: R
R
2
in
c
in
==
π
RRsource
>>
3
2
VCC
VCC
2
1/2
CLC5602
8
1
1
8
+
-
Rf
0.1
µF
6.8
µF
Vo
Vin
R
4
Cc
R
+
VV
R
R
2.5
o
in
f
g
=−
 +
low frequency cutoff
1
2R C
gc
=
π
Rg
3
2
VCC
VCC
2
1/2
CLC5602
+
-
Rf
0.1
µF
6.8
µF
Vo
Vin
VCC
0.1
µF
6.8
µF
VEE
3
2
4
+
+
Rg
Rt
V
V
A1
R
R
o
in
v
f
g
== +
1/2
CLC5602
8
1
+
-
Rf
0.1
µF
6.8
µF
Vo
Vin
VCC
0.1
µF
6.8
µF
VEE
Rg
Rb
3
2
4
+
+
Rt
Note: Rb provides DC bias
for the non-inverting input.
Select Rt to yield desired
Rin = Rt || Rg.
V
V
A
R
R
o
in
v
f
g
== −
1/2
CLC5602
8
1



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