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DP83256 データシート(PDF) 80 Page - National Semiconductor (TI) |
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DP83256 データシート(HTML) 80 Page - National Semiconductor (TI) |
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80 / 144 page ![]() 50 Registers (Continued) 536 SCRUB TIMER THRESHOLD REGISTER (STTR) This is the threshold value of the internal scrub timer It has a resolution of 4096 ms and a maximum value of E10 ms When the scrub timer reaches zero the Scrub Timer Expired (CMTCRSTE) bit is set Scrubbing is initiated when MODE2ESTCe1 and a trigger condition occurs Writing to STTR during scrubbing will not affect the scrubbing action ACCESS RULES ADDRESS READ WRITE 24h Always Always D7 D6 D5 D4 D3 D2 D1 D0 STT7 STT6 STT5 STT4 STT3 STT2 STT1 STT0 Bit Symbol Description D0 – D7 STT0 – STT7 SCRUB TIMER THRESHOLD BITk0-7l Scrub Timer threshold STT0 is the Least Significant Bit (LSB) 80 |
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