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データシートサーチシステム |
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データシートサーチシステム |
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DP83847 データシート(PDF) 2 Page - National Semiconductor (TI) |
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DP83847 データシート(HTML) 2 Page - National Semiconductor (TI) |
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2 / 60 page  2 www.national.com Figure 1. Block Diagram of the 10/100 DSP based core. SERIAL MANAGEMENT MII TRANSMIT CHANNELS & 100 Mb/s 10 Mb/s NRZ TO MANCHESTER ENCODER STATE MACHINES TRANSMIT FILTER LINK PULSE GENERATOR 4B/5B ENCODER PARALLEL TO SCRAMBLER NRZ TO NRZI ENCODER BINARY TO MLT-3 ENCODER 10/100 COMMON RECEIVE CHANNELS & 100 Mb/s 10 Mb/s MANCHESTER TO NRZ DECODER STATE MACHINES RECEIVE FILTER LINK PULSE DETECTOR 4B/5B DECODER DESCRAMBLER SERIAL TO PARALLEL NRZI TO NRZ DECODER MLT-3 TO 10/100 COMMON AUTO-NEGOTIATION STATE MACHINE REGISTERS AUTO 100BASE-TX 10BASE-T MII BASIC MODE PCS CONTROL PHY ADDRESS NEGOTIATION CLOCK CLOCK RECOVERY CLOCK RECOVERY CODE GROUP ALIGNMENT SMART SQUELCH RX_DATA RX_CLK RX_DATA RX_CLK TX_DATA TX_DATA TX_CLK SYSTEM CLOCK REFERENCE OUTPUT DRIVER TD± INPUT BUFFER BINARY DECODER ADAPTIVE RD± LED DRIVERS LEDS HARDWARE CONFIGURATION PINS GENERATION (AN_EN, AN0, AN1) CONTROL MII INTERFACE/CONTROL (PAUSE_EN) (LED_CFG, PHYAD) SERIAL BLW AND EQ COMP |
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