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LM10520MH/NOPB データシート(PDF) 13 Page - Texas Instruments |
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LM10520MH/NOPB データシート(HTML) 13 Page - Texas Instruments |
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13 / 40 page ![]() LM10520 www.ti.com SNVS638 – NOVEMBER 2010 Table 4. R4 - Device Capability Register Address 0x04 Type R/O Reset Default 8h'02 Bit Field Name Description or Comment 7:3 Always read back 0 2:0 Always read back 010, specifying PWI 2.0 Table 5. R9 - IAVS Default Register Address 0x09 Type R/W Reset Default 8h'7F Bit Field Name Description or Comment 7 Sign Always read back 0. 6:0 IAVS Default Current Data Code [6:0] Current (µA) 7h'00 60 7h'xx Linear Scaling 7h'7F 0 (default) Table 6. R10 - Ramp Control Address 0x0A Type R/W Reset Default 8h'9C Bit Field Name Description or Comment 7 Ramp Control Enable 1: Enabled 0: Disabled 6 Not Used Always read 0 5:3 Ramp Time Step Control Ramp Time Step Control Ramp Time Step (µs) 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 6 1 0 1 8 1 1 0 12 1 1 1 16 2:0 Ramp Code Step Control Ramp Code Step Rising Step (LSB) Falling Step (LSB) 0 0 0 1 1 0 0 1 2 1 0 1 0 3 2 0 1 1 4 3 1 0 0 6 4 1 0 1 8 5 1 1 0 12 6 1 1 1 16 8 Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Links: LM10520 |
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