WM8595 datasheet(39/82 Pages) WOLFSON

39 / 82 page

Production Data

WM8595

PD, Rev 4.2, January 2011

CHANNEL SWAP AND INVERSION

The WM8595 ADC input channels can be inverted and swapped in a number of ways to provide

maximum flexibility of input path to the ADC. The default configuration provides stereo output data

with the left and right channel data in the left and right channels. It is possible to swap the left and

right channels, invert them independently, or select the same data from both channels.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R13

ADC_CTRL1

0Dh

ADC_

LRSWAP

ADC Left/Right Swap

0 = Normal

1 = Swap left channel data into right channel

and vice-versa

ADCR_

INV

ADCL and ADCR Output Signal Inversion

0 = Output not inverted

1 = Output inverted

ADCL_

INV

11:10

ADC_

DATA_

SEL[1:0]

ADC Data Output Select

00 = left data from ADCL, right data from

ADCR

01 = left data from ADCL, right data from

ADCL

10 = left data from ADCR, right data from

ADCR

11 = left data from ADCR, right data from

ADCL

Table 30 ADC Channel Swap Control

HIGH PASS FILTER

The WM8595 includes a high pass filter to remove DC offsets. The high pass filter response is

shown on page 77. It is possible to disable the high pass filter by writing to ADC_HPD.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R13

ADC_CTRL1

0Dh

ADC_HPD

ADC High Pass Filter Disable

0 = High pass filter enabled

1 = High pass filter disabled

Table 31 High Pass Filter Disable Control

WM8595 データシート(PDF) 39 Page - Wolfson Microelectronics plc

WM8595 データシート(HTML) 39 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

データシートダウンロード