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RT9228CS データシート(PDF) 4 Page - Richtek Technology Corporation |
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RT9228CS データシート(HTML) 4 Page - Richtek Technology Corporation |
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4 / 10 page ![]() RT9228 www.richtek.com DS9228-03 July 2001 4 Function Block Diagram Functional Pin Description VCC (Pin 1) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. VID0, VID1, VID2, VID3, VID4 (Pin 6, 5, 4, 3, and 2) VID0~4 are the input pins to the 5-bit DAC. The states of these five pins program the internal voltage reference, DACOUT. The level of DACOUT sets the core converter output voltage. It also sets the core PGOOD and OVP thresholds. Table 1 specifies the DACOUT voltage of 32 combinations of VID levels. PGOOD (Pin 7) PGOOD is an open collector output used to indicate the status of the output voltage. This pin is pulled low when the core output is not within ±10% of the DACOUT reference voltage and the other outputs are below their under-voltage thresholds. The PGOOD output is open for ‘11111’ VID codes that inhibit operation. See table 1. FAULT (Pin 8) This pin is low during normal operation, but it is pulled to about 8V (VCC = 12V) in the event of an over-voltage or over-current condition. SS (Pin 9) Connect a capacitor from this pin to ground. This capacitor, along with an internal 11 µA (VSS>1V) current source, sets the soft-start interval of the converter. 110% 90% 115% POWER-ON RESET (POR) SOFT-START & FAULT LOGIC TTL D/A CONVERTER (DAC) OSCILLATOR GATE CONTROL LOGIC LINEAR UNDER VOLTAGE PGOOD PHASE1 LGATE1 PGND GND VCC FB3 FAULT VID0 VID1 VID2 VID3 SS 3.3V OCSET1 VSEN1 COMPENSATION GATE3 0.3V 3.3V VIN2 1.26V VOUT2 FB2 0.25A 0V VCC 11 µA 5V VID4 DACOUT ERROR AMP LUV OC1 FB1 PWM INHIBIT PWM COMP LOWER DRIVE VCC VCC UPPER DRIVE UGATE1 200 µA OC2 _ _ _ |
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