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TNETV2840ENGGU データシート(PDF) 42 Page - Texas Instruments

部品番号 TNETV2840ENGGU
部品情報  Fixed-Point Digital Signal Processor
PDF  91 Pages
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TNETV2840ENGGU データシート(HTML) 42 Page - Texas Instruments

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Functional Overview
42
December 1999 − Revised October 2008
SPRS122F
The McBSP is fully static and operates at arbitrarily low clock frequencies. For the maximum McBSP
multichannel operating frequency, see Section 5.9 of this data manual.
3.2.3.3
McBSP1 and McBSP2
The four McBSP1s from each subsystem share the same external signal pins. The four McBSP2s from each
subsystem share the same set of external signal pins. They can only operate in either of the following modes:
multichannel mode (x_BCLKR, x_BCLKX, x_BFSR, and x_BFSX are external and the McBSPs share
TDM stream with no single time slot assigned to more than one McBSP)
standard serial port mode (x_BCLKR, x_BCLKX, x_BFSR, and x_BFSX are external and only one McBSP
is enabled at one time).
For McBSP1 and McBSP2, no other mode is supported.
3.2.3.4
SA Multiplexer
The SA1 and SA2 multiplexers provide multiplexing for the four McBSP1s and the four McBSP2s from each
subsystem and present the data path to the device boundary. All the same functional pins from the four
McBSP1s are multiplexed together by SA1 and connect to the device external pins. All the same functional
pins from the four McBSP2s are multiplexed together by SA2 and connect to the device external pins. The
functional pins are: data receive (BDRn), data transmit (BDXn), receive frame sync (BFSRn), transmit frame
sync (BFSXn), receive shift clock (BCLKRn), and transmit shift clock (BCLKXn).
When McBSP operates in multichannel mode, software shall ensure that the same channel (time slot) not be
assigned by more than one subsystem. If more than one subsystem enables the same transmit time slot, the
results are undefined.
Figure 3−20 shows 5441 block diagram with SA1 logic; SA2 logic is identical.
DSP Subsystem A
DSP ID: 0000
McBSP1
McBSP1
DSP ID: 0001
DSP Subsystem B
McBSP1
DSP ID: 0010
DSP Subsystem C
McBSP1
DSP Subsystem D
DSP ID: 0011
SA1
NOTE: SA is the MUX/Arbitration logic for McBSP1 operation.
Figure 3−20. SA Multiplexer for McBSP1 Operation



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