MCP2035 datasheet(39/68 Pages) MICROCHIP

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 2012 Microchip Technology Inc.

DS22304A-page 39

MCP2035

5.16

Enable or Disable of Input

Channel

The Input channel can be enabled or disabled by

programming

the

LCXEN

bit

Configuration

enabled, it detects the input signal and provides output.

When the channel is disabled, the device shuts down

the input channel and provides no output, while saving

current draws. The exact circuits disabled when an

input is disabled are amplifiers, detector, full-wave

rectifier, data slicer, and modulation FET. However, the

RF input limiter remains active to protect the silicon

from excessive antenna input voltages.

5.17

AGC Amplifier

The circuit automatically amplifies input signal voltage

levels to an acceptable level for the data slicer. Fast

attacking and slow releasing by nature, the AGC tracks

the carrier signal level and not the modulated data bits.

The AGC requires an AGC initialization time (TAGC).

The AGC will attempt to regulate the input channel’s

peak signal voltage into the data slicer to a desired

regulated AGC voltage – reducing the input path’s gain

as the signal level attempts to increase above

regulated AGC voltage, and allowing full amplification

on signal levels below the regulated AGC voltage.

The AGC has two modes of operation:

• During the AGC initialization time (TAGC), the

AGC time constant is fast, allowing a reasonably

short acquisition time of the continuous input

signal.

• After TAGC, the AGC switches to a slower time

constant for data slicing.

Also, the AGC is frozen when the input signal envelope

is low. The AGC tracks only high envelope levels.

5.18

AGC Preserve

The AGC preserve feature is used to preserve the AGC

value during the AGC initialization time (TAGC) and

apply the value to the data slicing circuit for the follow-

ing data streams instead of using a new tracking value.

This feature is useful to demodulate the input signal

correctly when the input has random amplitude varia-

tions at a given time period. This feature is enabled

when the device receives an AGC Preserve On com-

mand and disabled if it receives an AGC Preserve Off

command. Once the AGC Preserve On command is

received, the device acquires a new AGC value during

each AGC initialization time and preserves the value

until a Soft Reset or an AGC Preserve Off command is

issued. Therefore, it does not need to issue another

AGC Preserve On command. An AGC Preserve Off

command is needed to disable the AGC preserve

feature (see Section 5.30.2.5 “AGC Preserve On

Command”

and Section 5.30.2.6 “AGC Preserve Off

Command”

for AGC Preserve commands).

5.19

Soft Reset

The Soft Reset is issued in the following events:

a) After Power-on Reset (POR)

b) After Inactivity Timer time-out

If an “Abort” occurs

d) After receiving SPI Soft Reset command

The “Abort” occurs if there is no positive signal

detected at the end of the AGC initialization period

(TAGC). The Soft Reset initializes internal circuits and

brings the device into a low current Standby mode

operation. The internal circuits that are initialized by the

Soft Reset include:

• Output Enable Filter

•AGC circuits

• Demodulator

• 32 kHz Internal Oscillator

The Soft Reset has no effect on the Configuration register

setup, except for some of the AFE STATUS Register 7

bits. (Register 5-8).

The circuit initialization takes one internal clock cycle

(1/32 kHz = 31.25 µs). During the initialization, the

modulation transistors between each input and

LCCOM pins are turned-on to discharge any internal/

external parasitic charges. The modulation transistors

are turned-off immediately after the initialization time.

The Soft Reset is executed in Active mode only. It is not

valid in Standby mode.

5.20

Minimum Modulation Depth

Requirement for Input Signal

The device demodulates the modulated input signal if

the modulation depth of the input signal is greater than

the minimum requirement that is programmed in

Configuration Register 5 (Register 5-6). Figure 5-5

shows the definition of the modulation depth and

examples.

MODMIN<6:5>

the

Configuration

and 6%. The default setting is 33%.

The purpose of this feature is to enhance the

demodulation integrity of the input signal. The 6%

setting is the best choice for the input signal with weak

modulation depth, which is typically observed near the

high-voltage Base Station antenna and also at far-

distance from the Base Station antenna. It gives the

best demodulation sensitivity, but is very susceptible to

noise spikes that can result in a bit detection error. The

60% setting can reduce the bit errors caused by noise,

but gives the least demodulation sensitivity. See

Table 5-3 for minimum modulation depth requirement

settings.

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