LT1737CS datasheet(16/28 Pages) LINER

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LT1737

1737f

this frequency the sense resistor will behave like an

inductor.

Several techniques can be used to tame this potential

parasitic inductance problem. First, any resistor used for

current sensing purposes must be of an inherently non-

inductive construction. Mounting this resistor directly

above an unbroken ground plane and minimizing its

ground side connection will serve to absolutely minimize

parasitic inductance. In the case of low valued sense

resistors, these may be implemented as a parallel combi-

nation of several resistors for the thermal considerations

cited above. The parallel combination will help to lower the

parasitic inductance. Finally, it may be necessary to place

a “pole” between the current sense resistor and the

LT1737 ISENSE pin to undo the action of the inductive zero

(see Figure 5). A value of 51

Ωissuggestedfortheresistor,

while the capacitor is selected empirically for the particular

application and layout. Using good high frequency mea-

surement techniques, the ISENSE pin waveform may be

observed directly with an oscilloscope while the capacitor

value is varied.

APPLICATIO S I FOR ATIO

GATE

PARASITIC

INDUCTANCE

CCOMP

RSENSE

1737 F05

Ω

PGND

SGND

ISENSE

f =

RSENSE

πLP

SENSE RESISTOR ZERO AT:

f =

π(51Ω)CCOMP

COMPENSATING POLE AT:

CCOMP =

RSENSE(51Ω)

FOR CANCELLATION:

Figure 5

SOFT-START FUNCTION

The LT1737 contains an optional soft-start function that is

enabled by connecting an explicit external capacitor be-

tween the SFST pin and ground. Internal circuitry prevents

the control voltage at the VC pin from exceeding that on the

SFST pin.

The soft-start function is enagaged whenever VCC power

is removed, or as a result of either undervoltage lockout

or thermal (overtemperature) shutdown. The SFST node

is then discharged rapidly to roughly a VBE above ground.

(Remember that the VC pin control node switching

threshold is deliberately set at a VBE plus several hundred

millivolts.) When this condition is removed, a nominal

µA current acts to charge up the SFST node towards

roughly 3V. So, for example, a 0.1

µF soft-start capacitor

will place a 0.4V/ms limit on the ramp rate at the VC node.

UVLO PIN FUNCTION

The UVLO pin effects both undervoltage lockout and

shutdown functions. This is accomplished by using differ-

ent voltage thresholds for the two functions—the shut-

down function is at roughly a VBE above ground (0.75V at

°C, large temperature variation), while the UVLO func-

tion is at nearly a bandgap voltage (1.25V, fairly stable with

temperature). An external resistor divider between the

input supply and ground can then be used to achieve a

user-programmable undervoltage lockout (see Figure 6a).

An additional feature of this pin is that there is a change in

the input bias current at this pin as a function of the state

of the internal UVLO comparator. As the pin is brought

above the UVLO threshold, the bias current sourced by the

part increases. This positive feedback effects a hysteresis

band for reliable switching action. Note that the size of the

hysteresis is proportional to the Thevenin impedance of

the external UVLO resistor divider network, which makes

it user programmable. As a rough rule of thumb, each 4k

or so of impedance generates about 1% of hysteresis.

(This is based on roughly 1.25V for the threshold and 3

µA

for the bias current shift.)

Even in good quality ground plane layouts, it is common

for the switching node (MOSFET drain) to couple to the

UVLO pin with a stray capacitance of several

thousandths

of a pF. To ensure proper UVLO action, a 100pF capacitor

is recommended from this pin to ground as shown in

Figure 6b. This will typically reduce the coupled noise to

a few millivolts. The UVLO filter capacitor should not be

made much larger than a few hundred pF, however, as the

hysteresis action will become too slow. In cases where

further filtering is required, e.g., to attenuate high speed

supply ripple, the topology in Figure 6c is recommended.

Resistor R1 has been split into two equal parts. This

provides a node for effecting capacitor filtering of high

speed supply ripple, while leaving the UVLO pin node

impedance relatively unchanged at high frequency.

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