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ES1022SI データシート(PDF) 3 Page - Altera Corporation

部品番号 ES1022SI
部品情報  Adjustable Quad Sequencer
PDF  14 Pages
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メーカー  ALTERA [Altera Corporation]
ホームページ  http://www.altera.com
Logo ALTERA - Altera Corporation

ES1022SI データシート(HTML) 3 Page - Altera Corporation

  ES1022SI Datasheet HTML 1Page - Altera Corporation ES1022SI Datasheet HTML 2Page - Altera Corporation ES1022SI Datasheet HTML 3Page - Altera Corporation ES1022SI Datasheet HTML 4Page - Altera Corporation ES1022SI Datasheet HTML 5Page - Altera Corporation ES1022SI Datasheet HTML 6Page - Altera Corporation ES1022SI Datasheet HTML 7Page - Altera Corporation ES1022SI Datasheet HTML 8Page - Altera Corporation ES1022SI Datasheet HTML 9Page - Altera Corporation Next Button
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Page 3
Enpirion Power Datasheet ES1022SI Adjustable Quad Sequencer
May 2014
Altera Corporation
Pinout
ES1022SI
(14 LD SOIC)
TOP VIEW
Pin Descriptions
Pin
Number
PIN NAME
FUNCTION DESCRIPTION
1
EN_D
EN output D. Active high open drain sequenced output. Sequenced on after EN_C and first output to sequence off. Pulls low
with VIN < 1V.
2
EN_C
EN output C. Active high open drain sequenced output. Sequenced on after EN_B and sequenced off after EN_D. Pulls low
with VIN < 1V.
3
EN_B
EN output B. Active high open drain sequenced output. Sequenced on after EN_A and sequenced off after EN_C. Pulls low
with VIN < 1V.
4
EN_A
EN output A. Active high open drain sequenced output. Sequenced on after CTIME period and sequenced off after EN_B. Pulls
low with VIN < 1V.
5
OV
The voltage on this pin must be under its 1.22V Vth or the four EN outputs will be immediately pulled down.
6
UV
The voltage on this pin must be over its 1.22V Vth or the four EN outputs will be immediately pulled down.
7
GND
IC ground.
8
FAULT
The VIN voltage when not within the desired UV to OV window will cause FAULT to be released to be pulled high to a voltage
equal to or less than VIN via an external resistor.
9
SEQ_EN
This pin provides a sequence on signal input with a high input. Internally pulled high to ~2.4V.
10
TIME
This pin provides a 2.6µA current output so that an adjustable VIN valid to sequencing on and off start delay period is created
with a capacitor to ground.
11
TDLY_AB
A resistor connected from this pin to ground determines the time delay from EN_A being active to EN _B being active on turn-
on and also going inactive on turn-off via the SEQ_EN input.
12
TDLY_BC
A resistor connected from this pin to ground determines the time delay from EN_B being active to EN _C being active on turn-
on and also going inactive on turn-off via the SEQ_EN input.
13
TDLY_CD
A resistor connected from this pin to ground determines the time delay from EN_C being active to EN _D being active on turn-
on and also going inactive on turn-off via the SEQ_EN input.
14
VIN
IC Bias Pin Nominally 3.3V to 24V
This pin requires a 1
μF decoupling capacitor close to IC pin.
EN_D
EN_C
EN_B
EN_A
1
2
3
4
5
VIN
TDLY_CD
TDLY_BC
TDLY_AB
6
7
8
9
14
TIME
SEQ_EN
FAULT
OV
UV
GND
13
12
11
10
10037
May 28, 2014
Rev A



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