AN024 datasheet(5/7 Pages) AIC

5 / 7 page

AN024

Layout Consideration

There are several notes needs to be considered

at layout PCB board.

1. The components, which follow large current,

should be placed as close as possibly for

reducing the loop. And each component

should be placed along the direction of output

current following in the circuit for reducing the

loss.

2. Each ground should be placed at the same

point to effectively reduce the loop. And the

ground plane shouldn’t be cut apart, or it may

occur disturbed signals and noise.

3. The traces, which following large current,

should be layout as width and shorten as

possibly for reducing the parasitism resistor.

Following shows the recommend layout of this

application circuit.

Fig. 4. Top Layer

Fig. 5. Bottom Layer

Fig. 6. Top Over Layer

Test Result

Efficiency Test

VIN (V)

IIN (mA)

VOUT (V)

IOUT (mA)

EFF (%)

343

4.952

500

90.23324

679

4.949

1000

91.10825

1374

4.9465

2000

90.00182

2103

4.943

3000

88.14194

246

4.983

500

84.40041

476

4.979

1000

87.16737

942

4.9585

2000

87.73001

1436

4.9585

3000

86.32486

215

4.9795

500

82.71595

421

4.976

1000

84.42484

829

4.9725

2000

85.68844

1257

4.97

3000

84.72554

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