STV8131

2/5

Figure 2. Block Diagram

CIRCUIT DESCRIPTION

The STV8131 is a dual voltage regulator with sep-

arate Disable for each output.

The two regulation parts are supplied from one

voltage reference circuit trimmed by zener zap

during EWS test.

Since the supply voltage of this last is connected

is not supplied.

The outputs stage have been realized in darlington

configuration with a drop typical 1.2V.

For each output a disable circuit switches-off this

output if a voltage lower than 0.8V is applied at

corresponding Pin (Pin 3 for output 2, Pin 5 for out-

put 1).

ABSOLUTE MAXIMUM RATINGS

THERMAL DATA

1

2

3

4

5

6

7

REFERENCE

OUTPUT 1

OUTPUT 2

PROTECTION

DISABLE

DISABLE

STV8131

OUTPUT 2

OUTPUT 1

DISABLE

DISABLE

INPUT 1

INPUT 2

Symbol

Parameter

Value

Unit

DC Input Voltage Pin 1

20

V

Disable Input Voltage Pin 3-5

20

V

Output Currents

Internally Limited

Power Dissipation

Internally Limited

Storage Temperature

- 65 to + 150

°C

unction Temperature

0 to + 150

°C

Symbol

Parameter

Value

Unit

Thermal Resistance Junction-case

Max.

3

°C/W

Recommended Junction Temperature

Max.

130

°C

1