DS1830U datasheet(4/7 Pages) DALLAS

データシートサーチシステム

DS1830U データシート(PDF) 4 Page - Dallas Semiconductor

部品番号	DS1830U

部品情報	Reset Sequence Pushbutton

PDF	7 Pages

Scroll/Zoom	100%

メーカー	DALLAS [Dallas Semiconductor]

ホームページ	https://www.maximintegrated.com/en.html

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4 / 7 page

D1830/A

4 of 7

APPLICATION DIAGRAM — CASCADE DELAY CONFIGURATIONS Figure 4

Note 1: The RST3 output tied to the pushbutton reset would be pulled to VCC through the 40kW resistor in

the pushbutton input. If a stronger pull-up is required an additional pull-up resistor could be added.

Note 2: When using the cascade configuration, it is important that the TOL pins of the master and the

slave are configured so that the master’s VCCTP is greater than the slave’s VCCTP. This will ensure that

when the master’s higher VCCTP is crossed, the resets will ripple through to the slave.

TIMING DIAGRAM — POWER-DOWN Figure 5

MASTER

SLAVE

SEE NOTE 2

SEE NOTE 1

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