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AS4C2M32SA データシート(PDF) 6 Page - Alliance Semiconductor Corporation

部品番号 AS4C2M32SA
部品情報  64Mb SDRAM AS4C2M32SA - 86pin TSOP II PACKAGE
PDF  54 Pages
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メーカー  ALSC [Alliance Semiconductor Corporation]
ホームページ  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C2M32SA データシート(HTML) 6 Page - Alliance Semiconductor Corporation

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Operation Mode
Fully synchronous operations are performed to latch the commands at the positive edges of CLK. Table
3
shows the truth table for the operation commands.
Table 3. Truth Table (Note (1), (2))
Command
State CKEn-1 CKEn DQM(6) BA0,1 A10 A0-9
CS# RAS# CAS# WE#
BankActivate
Idle(3)
H
X
X
V
Row address
L
L
H
H
BankPrecharge
Any
H
X
X
V
L
X
L
L
H
L
PrechargeAll
Any
H
X
X
X
H
X
L
L
H
L
Write
Active(3)
H
X
V
V
L
Column
address
(A0 ~ A7)
L
H
L
L
Write and AutoPrecharge
Active(3)
H
X
V
V
H
L
H
L
L
Read
Active(3)
H
X
V
V
L
Column
address
(A0 ~ A7)
L
H
L
H
Read and Autoprecharge
Active(3)
H
X
V
V
H
L
H
L
H
Mode Register Set
Idle
H
X
X
OP code
L
L
L
L
No-Operation
Any
H
X
X
X
X
X
L
H
H
H
Burst Stop
Active(4)
H
X
X
X
X
X
L
H
H
L
Device Deselect
Any
H
X
X
X
X
X
H
X
X
X
AutoRefresh
Idle
H
H
X
X
X
X
L
L
L
H
SelfRefresh Entry
Idle
H
L
X
X
X
X
L
L
L
H
SelfRefresh Exit
Idle
L
H
X
X
X
X
H
X
X
X
(SelfRefresh)
L
H
H
H
Clock Suspend Mode Entry
Active
H
L
X
X
X
X
H
X
X
X
L
V
V
V
Power Down Mode Entry
Any(5)
H
L
X
X
X
X
H
X
X
X
L
H
H
H
Clock Suspend Mode Exit
Active
L
H
X
X
X
X
X
X
X
X
Power Down Mode Exit
Any
L
H
X
X
X
X
H
X
X
X
(PowerDown)
L
H
H
H
Data Write/Output Enable
Active
H
X
L
X
X
X
X
X
X
X
Data Mask/Output Disable
Active
H
X
H
X
X
X
X
X
X
X
Note: 1. V = Valid, X = Don't care, L = Logic low, H = Logic high
2. CKEn signal is input level when commands are provided.
CKEn-1 signal is input level one clock cycle before the commands are provided.
3. These are states of bank designated by BA signal.
4. Device state is 1, 2, 4, 8, and full page burst operation.
5. Power Down Mode can not enter in the burst operation.
When this command is asserted in the burst cycle, device state is clock suspend mode.
6. DQM0-3
AS4C2M32SA-6TIN
AS4C2M32SA-6TCN
AS4C2M32SA-7TCN
Confidential
-6/54-
Rev.1.0 Sep. 2015



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