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ST7MC1 データシート(PDF) 250 Page - STMicroelectronics

部品番号 ST7MC1
部品情報  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, BRUSHLESS MOTOR CONTROL, FIVE TIMERS, SPI, LINSCI
PDF  308 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST7MC1 データシート(HTML) 250 Page - STMicroelectronics

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OPERATING CONDITIONS (Cont’d)
12.3.2 Operating Conditions with Low Voltage Detector (LVD)
Subject to general operating conditions for VDD, fOSC, and TA.
Notes:
1. Data based on characterization results, not tested in production.
12.3.3 Auxiliary Voltage Detector (AVD) Thresholds
Subject to general operating condition for VDD, fOSC, and TA.
Notes:
1. Data based on characterization results, not tested in production.
2. See “MAXIMUM VALUES OF AVD THRESHOLDS” on page 303..
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
3.90
4.20
4.50
V
VIT-(LVD)
Reset generation threshold
(VDD fall)
3.80
4.00
4.35
Vhys(LVD)
LVD voltage threshold hysteresis
VIT+(LVD)-VIT-(LVD)
200
mV
VtPOR
VDD rise time rate
1)
20
µs/V
100
ms/V
tg(VDD)
Width of filtered glitches on VDD
1)
(which are not detected by the LVD)
40
ns
Symbol
Parameter
Conditions
Min
Typ
Max2)
Unit
VIT+(AVD)
1
⇒0 AVDF flag toggle threshold
(VDD rise)
4.35
4.70
4.90
V
VIT-(AVD)
0
⇒1 AVDF flag toggle threshold
(VDD fall)
4.20
4.50
4.70
Vhyst(AVD) AVD voltage threshold hysteresis
1)
VIT+(AVD)-VIT-(AVD)
200
mV
∆V
IT-
Voltage drop between AVD flag set
and LVD reset activated)
VIT-(AVD)-VIT-(LVD)
450
mV



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