P89LPC930FDH datasheet(30/55 Pages) PHILIPS

部品番号	P89LPC930FDH

部品情報	8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM

PDF	55 Pages

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メーカー	PHILIPS [NXP Semiconductors]

ホームページ	http://www.nxp.com

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30 / 55 page

Philips Semiconductors

P89LPC930/931

8-bit microcontrollers with two-clock 80C51 core

Product data

Rev. 05 — 15 December 2004

30 of 55

9397 750 14472

8.18 I2C-bus serial interface

I2C-bus uses two wires (SDA and SCL) to transfer information between devices

connected to the bus, and it has the following features:

• Bidirectional data transfer between masters and slaves.

• Multimaster bus (no central master).

• Arbitration between simultaneously transmitting masters without corruption of

serial data on the bus.

• Serial clock synchronization allows devices with different bit rates to communicate

via one serial bus.

• Serial clock synchronization can be used as a handshake mechanism to suspend

and resume serial transfer.

• The I2C-bus may be used for test and diagnostic purposes.

A typical I2C-bus conﬁguration is shown in Figure 7. The P89LPC930/931 device

provides a byte-oriented I2C-bus interface that supports data transfers up to 400 kHz.

Fig 7.

I2C-bus conﬁguration.

OTHER DEVICE

WITH I2C-BUS

INTERFACE

SDA

SCL

OTHER DEVICE

WITH I2C-BUS

INTERFACE

P1.3/SDA

P1.2/SCL

P89LPC930/931

I2C-BUS

002aaa433

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