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MR44V064B データシート(PDF) 2 Page - LAPIS Semiconductor Co., Ltd.

部品番号 MR44V064B
部品情報  64k(8,192-Word 횞 8-Bit) FeRAM (Ferroelectric Random Access Memory) I2C
PDF  16 Pages
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メーカー  LAPIS [LAPIS Semiconductor Co., Ltd.]
ホームページ  http://www.lapis-semi.com/
Logo LAPIS - LAPIS Semiconductor Co., Ltd.

MR44V064B データシート(HTML) 2 Page - LAPIS Semiconductor Co., Ltd.

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MR44V064B
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PIN CONFIGURATION
PIN DESCRIPTIONS
Pin Name
Description
A0 – A2
Address ( input )
Address pin indicates device address. When Address value is match the device address
code from SDA, the device will be selected. The address pins are pulled down internally.
SDA
Serial data input serial data output ( input / output )
SDA is a bi-directional line for I2C interface. The output driver is open-drain. A pull-up
resistor is required.
SCL
Serial Clock ( input )
Serial Clock is the clock input pin for setting for serial data timing. Inputs are latched on
the rising edge and outputs occur on the falling edge.
WP
Write protect ( input )
Write Protect pin controls write-operation to the memory. When WP is high, all address in
the memory will be protected. When WP is low, all address in the memory will be written.
WP pin is pulled down internally.
VCC, VSS
Power supply
Apply the specified voltage to VCC. Connect VSS to ground.
8-pin plastic SOP
A0
A1
A2
VSS
VCC
WP
SCL
SDA
1
8
2
7
3
6
4
5



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