Am29F200B

35

ERASE AND PROGRAMMING PERFORMANCE

Notes:

programming typicals assume checkerboard pattern.

3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes

program faster than the maximum byte program time listed.

4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.

5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 1

for further information on command definitions.

6. The device has a guaranteed minimum erase and program cycle endurance of 1,000,000 cycles.

LATCHUP CHARACTERISTICS

TSOP AND SO PIN CAPACITANCE

Notes:

1. Sampled, not 100% tested.

DATA RETENTION

Parameter

Limits

Comments

Typ (Note 1)

Max (Note 2)

Unit

Sector Erase Time

1

8

sec

Excludes 00h programming prior to

erasure (Note 4)

Chip Erase Time

5

sec

Byte Programming Time

7

300

µs

Excludes system-level overhead

(Note 5)

Word Programming Time

12

500

µs

Chip Programming Time (Note 3)

1.8

5.4

sec

Parameter Description

Min

Max

–1.0 V

–100 mA

+100 mA

Parameter

Symbol

Parameter Description

Test Setup

Typ

Max

Unit

Input Capacitance

6

7.5

pF

Output Capacitance

8.5

12

pF

Control Pin Capacitance

8

10

pF

Parameter

Test Conditions

Min

Unit

Minimum Pattern Data Retention Time

150

°C

10

Years

125

°C

20

Years