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TFP403 データシート(PDF) 1 Page - Texas Instruments |
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TFP403 データシート(HTML) 1 Page - Texas Instruments |
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1 / 18 page ![]() TFP403 TI PanelBus DIGITAL RECEIVER SLDS125A – DECEMBER 2000 – REVISED OCTOBER 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Supports UXGA Resolution (Output Pixel Rates up to 165 MHz) D Digital Visual Interface (DVI 1.0) Specification Compliant1 D Pin-for-Pin Compatible With TFP501 for Simple Upgrade Path to HDCP2 D True-Color, 24 Bit/Pixel, 16.7M Colors at 1 or 2-Pixels per Clock D Laser Trimmed (50 Ω) Input Stage for Optimum Fixed Impedance Matching D Skew Tolerant up to One Pixel Clock Cycle (High Clock and Data Jitter Tolerance) D 4x Over-Sampling for Reduced Bit-Error Rates and Better Performance Over Longer Cables D Reduced Power Consumption—1.8-V Core Operation With 3.3 V I/Os and Supplies3 D Reduced Ground Bounce Using Time Staggered Pixel Outputs D Lowest Noise and Best Power Dissipation Using PowerPAD Packaging D Advanced Technology Using TI 0.18-µm EPIC-5 CMOS Process D Supports Hot Plug Detection description The Texas Instruments TFP403 is a PanelBus flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP403 finds applications in any design requiring high-speed digital interface. The TFP403 supports display resolutions up to UXGA in 24-bit true color pixel format. The TFP403 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce. PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultralow ground inductance. The TFP403 combines PanelBus circuit innovation with TIs advanced 0.18-µm EPIC-5 CMOS process technology, along with PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution. 1. The Digital Visual Interface Specification (DVI) is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP403 is compliant with the DVI Specification Rev. 1.0. 2. High-bandwidth digital content protection (HDCP) is the system used for protecting DVI outputs from being copied. The TFP501 is TI’s DVI receiver with HDCP functionality. 3. The TFP403 has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PanelBus, PowerPAD, and EPIC-5 are trademarks of Texas Instruments. |
同様の部品番号 - TFP403 |
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同様の説明 - TFP403 |
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