CY27020

Document Number: 38-07273 Rev. *H

Page 4 of 9

AC Electrical Specifications

Parameter

Description

Conditions

Min

Typ

Max

Unit

IFR

Input frequency range

44

48

52

MHz

Rise time [4, 5]

–12

ns

Fall time [4, 5]

–12

ns

SS%

Spread spectrum percentage

SSON# = 0, SSSEL = 0

–

–1

–

%

SSON# = 0, SSSEL = 1

–

–3

–

%

Power-up to stable output[6]

All output clocks

–

–

3

ms

Clock duty cycle [4, 6]

CL = 15 pF

45

50

55

%

REFOUT cycle-to-cycle jitter [4, 6] CL = 15 pF

–

–

350

ps

CLKOUT cycle-to-cycle jitter [4, 6]

–

100

250

ps

Application Schematic Example

Figure 3. Application Schematic Example [7, 8]

X IN

XO U T

C L 2

C L 1

0 .1 u F

33

33

V D D

RE F O UT

CL K O UT

C Y 27020

1

7

5

4

SSSEL

S S O N #

8

6

VSS

3

2

VSS

VSS

48 M H z

VD D

Notes

4. Parameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with fully loaded outputs. All outputs loaded with

15 pF.

6. Triggering is done at 1.5 V.

7. The circuit shows -1.0% spread. Refer to Frequency Table on page 1 for details.

8. Use the crystal manufacturer’s recommended values for CL1 and CL2 load capacitors.